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author | aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-13 15:02:23 +0000 |
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committer | aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-13 15:02:23 +0000 |
commit | a770dc7ea6423020d95a0420f57aa5e7c4c96888 (patch) | |
tree | 2311ddac5de53bc68f39c90cd73b94b599dacad0 /hw | |
parent | b8c18e4c901edae8cc14c07baa36f852be1f1ad0 (diff) | |
download | qemu-a770dc7ea6423020d95a0420f57aa5e7c4c96888.zip qemu-a770dc7ea6423020d95a0420f57aa5e7c4c96888.tar.gz qemu-a770dc7ea6423020d95a0420f57aa5e7c4c96888.tar.bz2 |
Add and use remaining #defines for PCI device IDs (Stuart Brady)
This patch adds and uses #defines for the remaining hardcoded PCI
device IDs. It also moves definitions taken from linux/pci_ids.h
into a separate header (hw/pci_ids.h), removes the 'RTL' from
PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500
to PCI_DEVICE_ID_MPC8533E to match Linux's definition.
Changes in v2:
* Don't use C99-style comments
* Move definitions from linux/pci_ids.h into a separate header
* Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/eepro100.c | 2 | ||||
-rw-r--r-- | hw/gt64xxx.c | 2 | ||||
-rw-r--r-- | hw/ne2000.c | 2 | ||||
-rw-r--r-- | hw/pci.h | 96 | ||||
-rw-r--r-- | hw/ppc4xx_pci.c | 2 | ||||
-rw-r--r-- | hw/ppce500_pci.c | 4 | ||||
-rw-r--r-- | hw/sh_pci.c | 2 | ||||
-rw-r--r-- | hw/usb-ohci.c | 3 | ||||
-rw-r--r-- | hw/versatile_pci.c | 2 |
9 files changed, 28 insertions, 87 deletions
diff --git a/hw/eepro100.c b/hw/eepro100.c index 790192a..9dd67fe 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -424,7 +424,7 @@ static void pci_reset(EEPRO100State * s) /* PCI Vendor ID */ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); /* PCI Device ID */ - pci_config_set_device_id(pci_conf, 0x1209); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82551IT); /* PCI Command */ PCI_CONFIG_16(PCI_COMMAND, 0x0000); /* PCI Status */ diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 53014bc..7fc91dd 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -1137,7 +1137,7 @@ PCIBus *pci_gt64120_init(qemu_irq *pic) /* FIXME: Malta specific hw assumptions ahead */ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MARVELL); - pci_config_set_device_id(d->config, 0x4620); /* device_id */ + pci_config_set_device_id(d->config, PCI_DEVICE_ID_MARVELL_GT6412X); d->config[0x04] = 0x00; d->config[0x05] = 0x00; diff --git a/hw/ne2000.c b/hw/ne2000.c index 1f8d957..24a66bb 100644 --- a/hw/ne2000.c +++ b/hw/ne2000.c @@ -789,7 +789,7 @@ PCIDevice *pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn) NULL, NULL); pci_conf = d->dev.config; pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK); - pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_RTL8029); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_8029); pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET); pci_conf[0x0e] = 0x00; // header_type pci_conf[0x3d] = 1; // interrupt pin 0 @@ -14,89 +14,40 @@ extern target_phys_addr_t pci_mem_base; #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) #define PCI_FUNC(devfn) ((devfn) & 0x07) -/* Device classes and subclasses */ +/* Class, Vendor and Device IDs from Linux's pci_ids.h */ +#include "pci_ids.h" -#define PCI_BASE_CLASS_STORAGE 0x01 -#define PCI_BASE_CLASS_NETWORK 0x02 +/* QEMU-specific Vendor and Device ID definitions */ -#define PCI_CLASS_STORAGE_SCSI 0x0100 -#define PCI_CLASS_STORAGE_IDE 0x0101 -#define PCI_CLASS_STORAGE_OTHER 0x0180 - -#define PCI_CLASS_NETWORK_ETHERNET 0x0200 - -#define PCI_CLASS_DISPLAY_VGA 0x0300 -#define PCI_CLASS_DISPLAY_OTHER 0x0380 - -#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 - -#define PCI_CLASS_MEMORY_RAM 0x0500 - -#define PCI_CLASS_SYSTEM_OTHER 0x0880 - -#define PCI_CLASS_SERIAL_USB 0x0c03 - -#define PCI_CLASS_BRIDGE_HOST 0x0600 -#define PCI_CLASS_BRIDGE_ISA 0x0601 -#define PCI_CLASS_BRIDGE_PCI 0x0604 -#define PCI_CLASS_BRIDGE_OTHER 0x0680 - -#define PCI_CLASS_PROCESSOR_CO 0x0b40 -#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 - -#define PCI_CLASS_OTHERS 0xff - -/* Vendors and devices. */ - -#define PCI_VENDOR_ID_LSI_LOGIC 0x1000 -#define PCI_DEVICE_ID_LSI_53C895A 0x0012 - -#define PCI_VENDOR_ID_DEC 0x1011 -#define PCI_DEVICE_ID_DEC_21154 0x0026 - -#define PCI_VENDOR_ID_CIRRUS 0x1013 - -#define PCI_VENDOR_ID_IBM 0x1014 +/* IBM (0x1014) */ +#define PCI_DEVICE_ID_IBM_440GX 0x027f #define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff -#define PCI_VENDOR_ID_AMD 0x1022 -#define PCI_DEVICE_ID_AMD_LANCE 0x2000 - +/* Hitachi (0x1054) */ #define PCI_VENDOR_ID_HITACHI 0x1054 +#define PCI_DEVICE_ID_HITACHI_SH7751R 0x350e -#define PCI_VENDOR_ID_MOTOROLA 0x1057 -#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 -#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 - -#define PCI_VENDOR_ID_APPLE 0x106b +/* Apple (0x106b) */ #define PCI_DEVICE_ID_APPLE_343S1201 0x0010 #define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e #define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f -#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 #define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 +#define PCI_DEVICE_ID_APPLE_IPID_USB 0x003f -#define PCI_VENDOR_ID_SUN 0x108e -#define PCI_DEVICE_ID_SUN_EBUS 0x1000 -#define PCI_DEVICE_ID_SUN_SIMBA 0x5000 -#define PCI_DEVICE_ID_SUN_SABRE 0xa000 - -#define PCI_VENDOR_ID_CMD 0x1095 -#define PCI_DEVICE_ID_CMD_646 0x0646 +/* Realtek (0x10ec) */ +#define PCI_DEVICE_ID_REALTEK_8029 0x8029 -#define PCI_VENDOR_ID_REALTEK 0x10ec -#define PCI_DEVICE_ID_REALTEK_RTL8029 0x8029 -#define PCI_DEVICE_ID_REALTEK_8139 0x8139 +/* Xilinx (0x10ee) */ +#define PCI_DEVICE_ID_XILINX_XC2VP30 0x0300 -#define PCI_VENDOR_ID_XILINX 0x10ee - -#define PCI_VENDOR_ID_MARVELL 0x11ab +/* Marvell (0x11ab) */ +#define PCI_DEVICE_ID_MARVELL_GT6412X 0x4620 +/* QEMU/Bochs VGA (0x1234) */ #define PCI_VENDOR_ID_QEMU 0x1234 #define PCI_DEVICE_ID_QEMU_VGA 0x1111 -#define PCI_VENDOR_ID_ENSONIQ 0x1274 -#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 - +/* VMWare (0x15ad) */ #define PCI_VENDOR_ID_VMWARE 0x15ad #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 @@ -105,18 +56,7 @@ extern target_phys_addr_t pci_mem_base; #define PCI_DEVICE_ID_VMWARE_IDE 0x1729 #define PCI_VENDOR_ID_INTEL 0x8086 -#define PCI_DEVICE_ID_INTEL_82441 0x1237 -#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 -#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 -#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 -#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 -#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 -#define PCI_DEVICE_ID_INTEL_82371AB 0x7111 -#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 -#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 - -#define PCI_VENDOR_ID_FSL 0x1957 -#define PCI_DEVICE_ID_FSL_E500 0x0030 +#define PCI_DEVICE_ID_INTEL_82551IT 0x1209 /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */ #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c index 601bfcf..2e67508 100644 --- a/hw/ppc4xx_pci.c +++ b/hw/ppc4xx_pci.c @@ -379,7 +379,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4], 0, NULL, NULL); pci_conf = controller->pci_dev->config; pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM); - pci_config_set_device_id(pci_conf, 0x027f); // device_id + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_440GX); pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER); /* CFGADDR */ diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index d5892e8..547218f 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -324,8 +324,8 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers) "host bridge", sizeof(PCIDevice), 0, NULL, NULL); - pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FSL); - pci_config_set_device_id(d->config, PCI_DEVICE_ID_FSL_E500); + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FREESCALE); + pci_config_set_device_id(d->config, PCI_DEVICE_ID_MPC8533E); pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_POWERPC); controller->pci_dev = d; diff --git a/hw/sh_pci.c b/hw/sh_pci.c index 8e3fce0..3f79b10 100644 --- a/hw/sh_pci.c +++ b/hw/sh_pci.c @@ -189,7 +189,7 @@ PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, cpu_register_physical_memory(0xfd000000, 0x1000000, mem); pci_config_set_vendor_id(p->dev->config, PCI_VENDOR_ID_HITACHI); - pci_config_set_device_id(p->dev->config, 0x350e); // SH7751R + pci_config_set_device_id(p->dev->config, PCI_DEVICE_ID_HITACHI_SH7751R); p->dev->config[0x04] = 0x80; p->dev->config[0x05] = 0x00; p->dev->config[0x06] = 0x90; diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c index 6ddc2aa..e59bc8a 100644 --- a/hw/usb-ohci.c +++ b/hw/usb-ohci.c @@ -1680,7 +1680,8 @@ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn) } pci_config_set_vendor_id(ohci->pci_dev.config, PCI_VENDOR_ID_APPLE); - pci_config_set_device_id(ohci->pci_dev.config, 0x003f); // device_id + pci_config_set_device_id(ohci->pci_dev.config, + PCI_DEVICE_ID_APPLE_IPID_USB); ohci->pci_dev.config[0x09] = 0x10; /* OHCI */ pci_config_set_class(ohci->pci_dev.config, PCI_CLASS_SERIAL_USB); ohci->pci_dev.config[0x3d] = 0x01; /* interrupt pin 1 */ diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index dea04ea..c9e2342 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -126,7 +126,7 @@ PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview) pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX); /* Both boards have the same device ID. Oh well. */ - pci_config_set_device_id(d->config, 0x0300); // device_id + pci_config_set_device_id(d->config, PCI_DEVICE_ID_XILINX_XC2VP30); d->config[0x04] = 0x00; d->config[0x05] = 0x00; d->config[0x06] = 0x20; |