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authorPeter Maydell <peter.maydell@linaro.org>2015-03-11 11:12:35 +0000
committerPeter Maydell <peter.maydell@linaro.org>2015-03-11 11:12:35 +0000
commit48412371415a260d00fc7fdcdb400da55f268828 (patch)
tree82c166adf2f69f4b6b24195b47fab7b767ab035c /hw
parent4ba4df405c766b7f9e46ef145e140961155348e6 (diff)
parent9886e834f47adabdbfd54ab606788ce7326e6779 (diff)
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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging
X86 patches queued in the last few weeks. Mostly code cleanup and changes on code assigning APIC ID. # gpg: Signature made Mon Mar 9 20:40:38 2015 GMT using RSA key ID 984DC5A6 # gpg: Can't check signature: public key not found * remotes/ehabkost/tags/x86-pull-request: target-i386: Require APIC ID to be explicitly set before CPU realize target-i386: Move APIC ID compatibility code to pc.c target-i386: Move CPUX86State::cpuid_apic_id to X86CPU::apic_id target-i386: Remove unused APIC ID default code target-i386: Eliminate unnecessary get_cpuid_vendor() function target-i386: Simplify listflags() function target-i386: Move topology.h to include/hw/i386 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/i386/pc.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 79eaad5..b5b2aad 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -25,6 +25,8 @@
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
#include "hw/i386/apic.h"
+#include "hw/i386/topology.h"
+#include "sysemu/cpus.h"
#include "hw/block/fdc.h"
#include "hw/ide.h"
#include "hw/pci/pci.h"
@@ -629,6 +631,39 @@ bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
return false;
}
+/* Enables contiguous-apic-ID mode, for compatibility */
+static bool compat_apic_id_mode;
+
+void enable_compat_apic_id_mode(void)
+{
+ compat_apic_id_mode = true;
+}
+
+/* Calculates initial APIC ID for a specific CPU index
+ *
+ * Currently we need to be able to calculate the APIC ID from the CPU index
+ * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
+ * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
+ * all CPUs up to max_cpus.
+ */
+static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
+{
+ uint32_t correct_id;
+ static bool warned;
+
+ correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
+ if (compat_apic_id_mode) {
+ if (cpu_index != correct_id && !warned) {
+ error_report("APIC IDs set in compatibility mode, "
+ "CPU topology won't match the configuration");
+ warned = true;
+ }
+ return cpu_index;
+ } else {
+ return correct_id;
+ }
+}
+
/* Calculates the limit to CPU APIC ID values
*
* This function returns the limit for the APIC ID value, so that all