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authorPeter Maydell <peter.maydell@linaro.org>2019-05-02 17:17:09 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-05-02 17:17:10 +0100
commitf62d632f4328fab02682335ba1ccfdbd9893d33d (patch)
treecca49d78c7df6ac7ab137c7139f812b3ec6ef101 /hw
parent8482ff2eb3bb95020eb2f370a9b3ea26511e41df (diff)
parentaff39be0ed9753c9c323f64a14f5533dd5c43525 (diff)
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-05-02' into staging
- Move qtest accel code to accel/qtest.c, get rid of AccelClass->available - Test TCG interpreter in gitlab-ci - Small improvements to the configure script - Use object_initialize_child in hw/pci-host # gpg: Signature made Thu 02 May 2019 17:07:34 BST # gpg: using RSA key 2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2019-05-02: hw/pci-host: Use object_initialize_child for correct reference counting configure: Relax check for libseccomp configure: Remove old *-config-devices.mak.d files when running configure configure: Add -Wno-typedef-redefinition to CFLAGS (for Clang) accel: Remove unused AccelClass::available field qtest: Don't compile qtest accel on non-POSIX systems qtest: Move accel code to accel/qtest.c gitlab-ci.yml: Test the TCG interpreter in a CI pipeline Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/pci-host/designware.c4
-rw-r--r--hw/pci-host/gpex.c5
-rw-r--r--hw/pci-host/q35.c4
-rw-r--r--hw/pci-host/xilinx-pcie.c4
4 files changed, 9 insertions, 8 deletions
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index 29ea313..64ad21d 100644
--- a/hw/pci-host/designware.c
+++ b/hw/pci-host/designware.c
@@ -721,8 +721,8 @@ static void designware_pcie_host_init(Object *obj)
DesignwarePCIEHost *s = DESIGNWARE_PCIE_HOST(obj);
DesignwarePCIERoot *root = &s->root;
- object_initialize(root, sizeof(*root), TYPE_DESIGNWARE_PCIE_ROOT);
- object_property_add_child(obj, "root", OBJECT(root), NULL);
+ object_initialize_child(obj, "root", root, sizeof(*root),
+ TYPE_DESIGNWARE_PCIE_ROOT, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(root), "multifunction", false);
}
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 2583b15..1bafffc 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -29,6 +29,7 @@
* http://www.firmware.org/1275/practice/imap/imap0_9d.pdf
*/
#include "qemu/osdep.h"
+#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/pci-host/gpex.h"
@@ -120,8 +121,8 @@ static void gpex_host_initfn(Object *obj)
GPEXHost *s = GPEX_HOST(obj);
GPEXRootState *root = &s->gpex_root;
- object_initialize(root, sizeof(*root), TYPE_GPEX_ROOT_DEVICE);
- object_property_add_child(obj, "gpex_root", OBJECT(root), NULL);
+ object_initialize_child(obj, "gpex_root", root, sizeof(*root),
+ TYPE_GPEX_ROOT_DEVICE, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(root), "multifunction", false);
}
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 7b871b5..960939f 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -216,8 +216,8 @@ static void q35_host_initfn(Object *obj)
memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb,
"pci-conf-data", 4);
- object_initialize(&s->mch, sizeof(s->mch), TYPE_MCH_PCI_DEVICE);
- object_property_add_child(OBJECT(s), "mch", OBJECT(&s->mch), NULL);
+ object_initialize_child(OBJECT(s), "mch", &s->mch, sizeof(s->mch),
+ TYPE_MCH_PCI_DEVICE, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false);
/* mch's object_initialize resets the default value, set it again */
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 60309af..ceb00e2 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -149,8 +149,8 @@ static void xilinx_pcie_host_init(Object *obj)
XilinxPCIEHost *s = XILINX_PCIE_HOST(obj);
XilinxPCIERoot *root = &s->root;
- object_initialize(root, sizeof(*root), TYPE_XILINX_PCIE_ROOT);
- object_property_add_child(obj, "root", OBJECT(root), NULL);
+ object_initialize_child(obj, "root", root, sizeof(*root),
+ TYPE_XILINX_PCIE_ROOT, &error_abort, NULL);
qdev_prop_set_int32(DEVICE(root), "addr", PCI_DEVFN(0, 0));
qdev_prop_set_bit(DEVICE(root), "multifunction", false);
}