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| author | Daniel P. Berrangé <berrange@redhat.com> | 2021-05-07 14:36:49 +0100 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2021-05-31 15:53:03 -0400 |
| commit | b7c290177ce1f035db8cdd8abf97b94a44e27f8c (patch) | |
| tree | f7fbac1155f55100d515f09455572570ddcbef5c /hw | |
| parent | f9c0322a5ff5dc28be41290a26d0133e86a6ea4c (diff) | |
| download | qemu-b7c290177ce1f035db8cdd8abf97b94a44e27f8c.zip qemu-b7c290177ce1f035db8cdd8abf97b94a44e27f8c.tar.gz qemu-b7c290177ce1f035db8cdd8abf97b94a44e27f8c.tar.bz2 | |
i386: use better matching family/model/stepping for 'qemu64' CPU
The 'qemu64' CPUID currently reports a family/model/stepping that
approximately corresponds to an AMD K7 vintage architecture.
The K7 series predates the introduction of 64-bit support by AMD
in the K8 series. This has been reported to lead to LLVM complaints
about generating 64-bit code for a 32-bit CPU target
LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
It appears LLVM looks at the family/model/stepping, despite qemu64
reporting it is 64-bit capable.
This patch changes 'qemu64' to report a CPUID with the family, model
and stepping taken from a
AMD Athlon(tm) 64 X2 Dual Core Processor 4000+
which is one of the first 64-bit AMD CPUs.
Closes https://gitlab.com/qemu-project/qemu/-/issues/191
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20210507133650.645526-2-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/i386/pc.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8cfaf21..c6d8d0d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -94,7 +94,11 @@ #include "trace.h" #include CONFIG_DEVICES -GlobalProperty pc_compat_6_0[] = {}; +GlobalProperty pc_compat_6_0[] = { + { "qemu64" "-" TYPE_X86_CPU, "family", "6" }, + { "qemu64" "-" TYPE_X86_CPU, "model", "6" }, + { "qemu64" "-" TYPE_X86_CPU, "stepping", "3" }, +}; const size_t pc_compat_6_0_len = G_N_ELEMENTS(pc_compat_6_0); GlobalProperty pc_compat_5_2[] = { |