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| author | Jan Kiszka <jan.kiszka@siemens.com> | 2018-02-24 09:30:12 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2018-03-01 16:25:37 +0200 |
| commit | b7a7bb358f2a9073922671f4616dfbe1e9566988 (patch) | |
| tree | 8829c8608cbfeea51bf95beb34af6cd8c0f3674d /hw | |
| parent | 2080a29f0e9cb2d456fabafbba936c8f78228a21 (diff) | |
| download | qemu-b7a7bb358f2a9073922671f4616dfbe1e9566988.zip qemu-b7a7bb358f2a9073922671f4616dfbe1e9566988.tar.gz qemu-b7a7bb358f2a9073922671f4616dfbe1e9566988.tar.bz2 | |
intel-iommu: Accept 64-bit writes to FEADDR
Xen is doing this [1] and currently triggers an abort.
[1] http://xenbits.xenproject.org/gitweb/?p=xen.git;a=blob;f=xen/drivers/passthrough/vtd/iommu.c;h=daaed0abbdd06b6ba3d948ea103aadf02651e83c;hb=refs/heads/master#l1108
Reported-by: Luis Lloret <luis_lloret@mentor.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/i386/intel_iommu.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 2e841cd..fb31de9 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2129,8 +2129,15 @@ static void vtd_mem_write(void *opaque, hwaddr addr, /* Fault Event Address Register, 32-bit */ case DMAR_FEADDR_REG: - assert(size == 4); - vtd_set_long(s, addr, val); + if (size == 4) { + vtd_set_long(s, addr, val); + } else { + /* + * While the register is 32-bit only, some guests (Xen...) write to + * it with 64-bit. + */ + vtd_set_quad(s, addr, val); + } break; /* Fault Event Upper Address Register, 32-bit */ |