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| author | Marcel Apfelbaum <marcel@redhat.com> | 2017-10-02 13:31:35 +0300 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2017-10-15 05:54:43 +0300 |
| commit | 8e36c336d943c3bfe0d06f5465cc64d44b306e13 (patch) | |
| tree | a73dacf224e235bb072d6e879e82161bea23ace8 /hw | |
| parent | 2fefa16cec5a719f5cbc26c0672dd2099cd2ed9b (diff) | |
| download | qemu-8e36c336d943c3bfe0d06f5465cc64d44b306e13.zip qemu-8e36c336d943c3bfe0d06f5465cc64d44b306e13.tar.gz qemu-8e36c336d943c3bfe0d06f5465cc64d44b306e13.tar.bz2 | |
hw/gen_pcie_root_port: make IO RO 0 on IO disabled
IO_LIMIT and IO_BASE registers should not be writable if
gen_pcie_root_port's io-reserve property is set to 0.
The COMMAND register should have the IO flag read only.
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/pci-bridge/gen_pcie_root_port.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index ed03ffc..ad4e6aa 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp) rpc->parent_class.exit(d); return; } + + if (!grp->io_reserve) { + pci_word_test_and_clear_mask(d->wmask + PCI_COMMAND, + PCI_COMMAND_IO); + d->wmask[PCI_IO_BASE] = 0; + d->wmask[PCI_IO_LIMIT] = 0; + } } static const VMStateDescription vmstate_rp_dev = { |