char device support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1023 c046a42c-6fe2-441c-8c8c-71466251a162

4 files changed, 23 insertions, 33 deletions

diff --git a/hw/pc.c b/hw/pc.c
index 11b2827..0fd7b87 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -324,7 +324,7 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
              const char *initrd_filename)
 {
     char buf[1024];
-    int ret, linux_boot, initrd_size, i, nb_nics1, fd;
+    int ret, linux_boot, initrd_size, i, nb_nics1;
     unsigned long bios_offset, vga_bios_offset;
     int bios_size, isa_bios_size;
     PCIBus *pci_bus;
@@ -471,8 +471,7 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
     pic_init();
     pit = pit_init(0x40, 0);
 
-    fd = serial_open_device();
-    serial_init(0x3f8, 4, fd);
+    serial_init(0x3f8, 4, serial_hd);
 
     if (pci_enabled) {
         for(i = 0; i < nb_nics; i++) {
diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c
index 9383532..f532fe1 100644
--- a/hw/ppc_chrp.c
+++ b/hw/ppc_chrp.c
@@ -126,7 +126,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
     openpic_t *openpic;
     m48t59_t *nvram;
     int PPC_io_memory;
-    int ret, linux_boot, i, fd;
+    int ret, linux_boot, i;
     unsigned long bios_offset;
     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
     PCIBus *pci_bus;
@@ -200,8 +200,7 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
     pic_init();
 
     /* XXX: use Mac Serial port */
-    fd = serial_open_device();
-    serial_init(0x3f8, 4, fd);
+    serial_init(0x3f8, 4, serial_hd);
 
     for(i = 0; i < nb_nics; i++) {
         pci_ne2000_init(pci_bus, &nd_table[i]);
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 88dcac8..eeb5a36 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -415,7 +415,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
     char buf[1024];
     m48t59_t *nvram;
     int PPC_io_memory;
-    int ret, linux_boot, i, nb_nics1, fd;
+    int ret, linux_boot, i, nb_nics1;
     unsigned long bios_offset;
     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
     PCIBus *pci_bus;
@@ -492,8 +492,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
     pic_init();
     //    pit = pit_init(0x40, 0);
 
-    fd = serial_open_device();
-    serial_init(0x3f8, 4, fd);
+    serial_init(0x3f8, 4, serial_hd);
     nb_nics1 = nb_nics;
     if (nb_nics1 > NE2000_NB_MAX)
         nb_nics1 = NE2000_NB_MAX;
diff --git a/hw/serial.c b/hw/serial.c
index 3cf43f4..0fc1ccb 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -84,7 +84,7 @@ struct SerialState {
        it can be reset while reading iir */
     int thr_ipending;
     int irq;
-    int out_fd;
+    CharDriverState *chr;
 };
 
 static void serial_update_irq(SerialState *s)
@@ -107,7 +107,6 @@ static void serial_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 {
     SerialState *s = opaque;
     unsigned char ch;
-    int ret;
     
     addr &= 7;
 #ifdef DEBUG_SERIAL
@@ -122,13 +121,8 @@ static void serial_ioport_write(void *opaque, uint32_t addr, uint32_t val)
             s->thr_ipending = 0;
             s->lsr &= ~UART_LSR_THRE;
             serial_update_irq(s);
-
-            if (s->out_fd >= 0) {
-                ch = val;
-                do {
-                    ret = write(s->out_fd, &ch, 1);
-                } while (ret != 1);
-            }
+            ch = val;
+            qemu_chr_write(s->chr, &ch, 1);
             s->thr_ipending = 1;
             s->lsr |= UART_LSR_THRE;
             s->lsr |= UART_LSR_TEMT;
@@ -223,19 +217,19 @@ static uint32_t serial_ioport_read(void *opaque, uint32_t addr)
     return ret;
 }
 
-int serial_can_receive(SerialState *s)
+static int serial_can_receive(SerialState *s)
 {
     return !(s->lsr & UART_LSR_DR);
 }
 
-void serial_receive_byte(SerialState *s, int ch)
+static void serial_receive_byte(SerialState *s, int ch)
 {
     s->rbr = ch;
     s->lsr |= UART_LSR_DR;
     serial_update_irq(s);
 }
 
-void serial_receive_break(SerialState *s)
+static void serial_receive_break(SerialState *s)
 {
     s->rbr = 0;
     s->lsr |= UART_LSR_BI | UART_LSR_DR;
@@ -254,8 +248,15 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size)
     serial_receive_byte(s, buf[0]);
 }
 
+static void serial_event(void *opaque, int event)
+{
+    SerialState *s = opaque;
+    if (event == CHR_EVENT_BREAK)
+        serial_receive_break(s);
+}
+
 /* If fd is zero, it means that the serial device uses the console */
-SerialState *serial_init(int base, int irq, int fd)
+SerialState *serial_init(int base, int irq, CharDriverState *chr)
 {
     SerialState *s;
 
@@ -268,16 +269,8 @@ SerialState *serial_init(int base, int irq, int fd)
 
     register_ioport_write(base, 8, 1, serial_ioport_write, s);
     register_ioport_read(base, 8, 1, serial_ioport_read, s);
-
-    if (fd < 0) {
-        /* no associated device */
-        s->out_fd = -1;
-    } else if (fd != 0) {
-        qemu_add_fd_read_handler(fd, serial_can_receive1, serial_receive1, s);
-        s->out_fd = fd;
-    } else {
-        serial_console = s;
-        s->out_fd = 1;
-    }
+    s->chr = chr;
+    qemu_chr_add_read_handler(chr, serial_can_receive1, serial_receive1, s);
+    qemu_chr_add_event_handler(chr, serial_event);
     return s;
 }