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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-05-04 09:28:22 +0200 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-05-11 11:05:52 +0100 |
commit | 602ab789363741aee29aeacc6b024af72161f3f7 (patch) | |
tree | 4784346e7c4067249ab6ef27fbf7c94d2d07a417 /hw | |
parent | 27d6dea3d702b4f9cefacfc8438a9478c03092e4 (diff) | |
download | qemu-602ab789363741aee29aeacc6b024af72161f3f7.zip qemu-602ab789363741aee29aeacc6b024af72161f3f7.tar.gz qemu-602ab789363741aee29aeacc6b024af72161f3f7.tar.bz2 |
hw/timer/nrf51_timer: Add trace event of counter value update
Add trace event to display timer's counter value updates.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200504072822.18799-5-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/timer/nrf51_timer.c | 1 | ||||
-rw-r--r-- | hw/timer/trace-events | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/hw/timer/nrf51_timer.c b/hw/timer/nrf51_timer.c index 38cea05..42be79c 100644 --- a/hw/timer/nrf51_timer.c +++ b/hw/timer/nrf51_timer.c @@ -240,6 +240,7 @@ static void nrf51_timer_write(void *opaque, hwaddr offset, idx = (offset - NRF51_TIMER_TASK_CAPTURE_0) / 4; s->cc[idx] = s->counter; + trace_nrf51_timer_set_count(s->id, idx, s->counter); } break; case NRF51_TIMER_EVENT_COMPARE_0 ... NRF51_TIMER_EVENT_COMPARE_3: diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 43b605c..80ea197 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -69,6 +69,7 @@ cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" # nrf51_timer.c nrf51_timer_read(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) "timer %u read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) "timer %u write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" +nrf51_timer_set_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) "timer %u counter %u count 0x%" PRIx32 # bcm2835_systmr.c bcm2835_systmr_irq(bool enable) "timer irq state %u" |