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authorPeter Maydell <peter.maydell@linaro.org>2020-11-03 11:49:18 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-11-10 11:03:48 +0000
commit0e5dc775736fda574e0df9c4c9a29c92201833fe (patch)
treeaf9287a9b51cf5089da3e5d57aa7ea705caafbd7 /hw
parent44cbf34975b81ac40e715cd3ee488a114d7b7d29 (diff)
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hw/arm/nseries: Check return value from load_image_targphys()
The nseries machines have a codepath that allows them to load a secondary bootloader. This code wasn't checking that the load_image_targphys() succeeded. Check the return value and report the error to the user. While we're in the vicinity, fix the comment style of the comment documenting what this image load is doing. Fixes: Coverity CID 1192904 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201103114918.11807-1-peter.maydell@linaro.org
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/nseries.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c
index 6215c18..387eea4 100644
--- a/hw/arm/nseries.c
+++ b/hw/arm/nseries.c
@@ -1369,7 +1369,8 @@ static void n8x0_init(MachineState *machine,
/* No, wait, better start at the ROM. */
s->mpu->cpu->env.regs[15] = OMAP2_Q2_BASE + 0x400000;
- /* This is intended for loading the `secondary.bin' program from
+ /*
+ * This is intended for loading the `secondary.bin' program from
* Nokia images (the NOLO bootloader). The entry point seems
* to be at OMAP2_Q2_BASE + 0x400000.
*
@@ -1377,9 +1378,15 @@ static void n8x0_init(MachineState *machine,
* for them the entry point needs to be set to OMAP2_SRAM_BASE.
*
* The code above is for loading the `zImage' file from Nokia
- * images. */
- load_image_targphys(option_rom[0].name, OMAP2_Q2_BASE + 0x400000,
- machine->ram_size - 0x400000);
+ * images.
+ */
+ if (load_image_targphys(option_rom[0].name,
+ OMAP2_Q2_BASE + 0x400000,
+ machine->ram_size - 0x400000) < 0) {
+ error_report("Failed to load secondary bootloader %s",
+ option_rom[0].name);
+ exit(EXIT_FAILURE);
+ }
n800_setup_nolo_tags(nolo_tags);
cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000);