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authorAlexander Graf <agraf@suse.de>2010-12-08 12:05:40 +0100
committerBlue Swirl <blauwirbel@gmail.com>2010-12-11 15:24:25 +0000
commit6ebf5905f4a664a873cf7f49094960f08cb3a2d5 (patch)
tree4491565c563b2d3d60dc97e895b30278cb16300e /hw/unin_pci.c
parent0f4f039b9895e2e52d591a123017cb53fe636f9d (diff)
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pci-host: Delegate bswap to mmio layer
The only reason we have bswap versions of the pci host code is that most pci host devices are little endian. The ppc e500 is the only odd one here, being big endian. So let's directly pass the endianness down to the mmio layer and not worry about it on the pci host layer. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/unin_pci.c')
-rw-r--r--hw/unin_pci.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 53791dd..f2e440e 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -151,7 +151,8 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
/* Uninorth main bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state,
+ DEVICE_LITTLE_ENDIAN);
s->data_handler.read = unin_data_read;
s->data_handler.write = unin_data_write;
pci_mem_data = cpu_register_io_memory_simple(&s->data_handler,
@@ -173,7 +174,8 @@ static int pci_u3_agp_init_device(SysBusDevice *dev)
/* Uninorth U3 AGP bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state,
+ DEVICE_LITTLE_ENDIAN);
s->data_handler.read = unin_data_read;
s->data_handler.write = unin_data_write;
pci_mem_data = cpu_register_io_memory_simple(&s->data_handler,
@@ -196,8 +198,10 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
/* Uninorth AGP bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state,
+ DEVICE_LITTLE_ENDIAN);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state,
+ DEVICE_LITTLE_ENDIAN);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
@@ -211,8 +215,10 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
/* Uninorth internal bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state,
+ DEVICE_LITTLE_ENDIAN);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state,
+ DEVICE_LITTLE_ENDIAN);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;