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| author | Bin Meng <bin.meng@windriver.com> | 2021-01-29 21:23:21 +0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-02-02 17:00:55 +0000 |
| commit | 24bf8ef3f5300943940fd054763f92808f8481a0 (patch) | |
| tree | 68c5d0a975dcb78a517a3928f7cad2aa81a16a9c /hw/ssi/imx_spi.c | |
| parent | 50dc25932eb31fca15104968e596b7035ce9ece1 (diff) | |
| download | qemu-24bf8ef3f5300943940fd054763f92808f8481a0.zip qemu-24bf8ef3f5300943940fd054763f92808f8481a0.tar.gz qemu-24bf8ef3f5300943940fd054763f92808f8481a0.tar.bz2 | |
hw/ssi: imx_spi: Round up the burst length to be multiple of 8
Current implementation of the imx spi controller expects the burst
length to be multiple of 8, which is the most common use case.
In case the burst length is not what we expect, log it to give user
a chance to notice it, and round it up to be multiple of 8.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-id: 20210129132323.30946-9-bmeng.cn@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ssi/imx_spi.c')
| -rw-r--r-- | hw/ssi/imx_spi.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c index 2fb6549..41fe199 100644 --- a/hw/ssi/imx_spi.c +++ b/hw/ssi/imx_spi.c @@ -128,7 +128,14 @@ static uint8_t imx_spi_selected_channel(IMXSPIState *s) static uint32_t imx_spi_burst_length(IMXSPIState *s) { - return EXTRACT(s->regs[ECSPI_CONREG], ECSPI_CONREG_BURST_LENGTH) + 1; + uint32_t burst; + + burst = EXTRACT(s->regs[ECSPI_CONREG], ECSPI_CONREG_BURST_LENGTH) + 1; + if (burst % 8) { + burst = ROUND_UP(burst, 8); + } + + return burst; } static bool imx_spi_is_enabled(IMXSPIState *s) @@ -328,6 +335,7 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value, IMXSPIState *s = opaque; uint32_t index = offset >> 2; uint32_t change_mask; + uint32_t burst; if (index >= ECSPI_MAX) { qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: Bad register at offset 0x%" @@ -380,6 +388,13 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value, case ECSPI_CONREG: s->regs[ECSPI_CONREG] = value; + burst = EXTRACT(s->regs[ECSPI_CONREG], ECSPI_CONREG_BURST_LENGTH) + 1; + if (burst % 8) { + qemu_log_mask(LOG_UNIMP, + "[%s]%s: burst length %d not supported: rounding up to next multiple of 8\n", + TYPE_IMX_SPI, __func__, burst); + } + if (!imx_spi_is_enabled(s)) { /* device is disabled, so this is a soft reset */ imx_spi_soft_reset(s); |