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authorMarkus Armbruster <armbru@redhat.com>2020-06-10 07:31:58 +0200
committerMarkus Armbruster <armbru@redhat.com>2020-06-15 22:00:10 +0200
commit3e80f6902c13f6edb6675c0f33edcbbf0163ec32 (patch)
treec96a01def8de48a3fc1721bfe6344b9993bfaecf /hw/sparc
parentdc3edf8d8a544dbf21e1cb63339e42806470d5d9 (diff)
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qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous. Takes care of just one pattern that needs conversion. More to come in this series. Coccinelle script: @ depends on !(file in "hw/arm/highbank.c")@ expression bus, type_name, dev, expr; @@ - dev = qdev_create(bus, type_name); + dev = qdev_new(type_name); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr; identifier DOWN; @@ - dev = DOWN(qdev_create(bus, type_name)); + dev = DOWN(qdev_new(type_name)); ... when != dev = expr - qdev_init_nofail(DEVICE(dev)); + qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal); @@ expression bus, type_name, expr; identifier dev; @@ - DeviceState *dev = qdev_create(bus, type_name); + DeviceState *dev = qdev_new(type_name); ... when != dev = expr - qdev_init_nofail(dev); + qdev_realize_and_unref(dev, bus, &error_fatal); @@ expression bus, type_name, dev, expr, errp; symbol true; @@ - dev = qdev_create(bus, type_name); + dev = qdev_new(type_name); ... when != dev = expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); @@ expression bus, type_name, expr, errp; identifier dev; symbol true; @@ - DeviceState *dev = qdev_create(bus, type_name); + DeviceState *dev = qdev_new(type_name); ... when != dev = expr - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize_and_unref(dev, bus, errp); The first rule exempts hw/arm/highbank.c, because it matches along two control flow paths there, with different @type_name. Covered by the next commit's manual conversions. Missing #include "qapi/error.h" added manually. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200610053247.1583243-10-armbru@redhat.com> [Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
Diffstat (limited to 'hw/sparc')
-rw-r--r--hw/sparc/leon3.c12
-rw-r--r--hw/sparc/sun4m.c64
2 files changed, 38 insertions, 38 deletions
diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c
index d3ab8c9..69fb399 100644
--- a/hw/sparc/leon3.c
+++ b/hw/sparc/leon3.c
@@ -228,12 +228,12 @@ static void leon3_generic_hw_init(MachineState *machine)
GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA);
/* Allocate IRQ manager */
- dev = qdev_create(NULL, TYPE_GRLIB_IRQMP);
+ dev = qdev_new(TYPE_GRLIB_IRQMP);
qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in,
env, "pil", 1);
qdev_connect_gpio_out_named(dev, "grlib-irq", 0,
qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0));
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET);
env->irq_manager = dev;
env->qemu_irq_ack = leon3_irq_manager;
@@ -322,11 +322,11 @@ static void leon3_generic_hw_init(MachineState *machine)
}
/* Allocate timers */
- dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER);
+ dev = qdev_new(TYPE_GRLIB_GPTIMER);
qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
for (i = 0; i < LEON3_TIMER_COUNT; i++) {
@@ -339,9 +339,9 @@ static void leon3_generic_hw_init(MachineState *machine)
0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA);
/* Allocate uart */
- dev = qdev_create(NULL, TYPE_GRLIB_APB_UART);
+ dev = qdev_new(TYPE_GRLIB_APB_UART);
qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]);
grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 249f7ba..5ebf303 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -316,9 +316,9 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, TYPE_SUN4M_IOMMU);
+ dev = qdev_new(TYPE_SUN4M_IOMMU);
qdev_prop_set_uint32(dev, "version", version);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, addr);
@@ -336,8 +336,8 @@ static void *sparc32_dma_init(hwaddr dma_base,
SysBusESPState *esp;
SysBusPCNetState *lance;
- dma = qdev_create(NULL, TYPE_SPARC32_DMA);
- qdev_init_nofail(dma);
+ dma = qdev_new(TYPE_SPARC32_DMA);
+ qdev_realize_and_unref(dma, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base);
espdma = SPARC32_ESPDMA_DEVICE(object_resolve_path_component(
@@ -367,8 +367,8 @@ static DeviceState *slavio_intctl_init(hwaddr addr,
SysBusDevice *s;
unsigned int i, j;
- dev = qdev_create(NULL, "slavio_intctl");
- qdev_init_nofail(dev);
+ dev = qdev_new("slavio_intctl");
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
@@ -395,9 +395,9 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq master_irq,
SysBusDevice *s;
unsigned int i;
- dev = qdev_create(NULL, "slavio_timer");
+ dev = qdev_new("slavio_timer");
qdev_prop_set_uint32(dev, "num_cpus", num_cpus);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, master_irq);
sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);
@@ -433,8 +433,8 @@ static void slavio_misc_init(hwaddr base,
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "slavio_misc");
- qdev_init_nofail(dev);
+ dev = qdev_new("slavio_misc");
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
if (base) {
/* 8 bit registers */
@@ -470,9 +470,9 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_t version)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "eccmemctl");
+ dev = qdev_new("eccmemctl");
qdev_prop_set_uint32(dev, "version", version);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, base);
@@ -486,8 +486,8 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_halt)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "apc");
- qdev_init_nofail(dev);
+ dev = qdev_new("apc");
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
/* Power management (APC) XXX: not a Slavio device */
sysbus_mmio_map(s, 0, power_base);
@@ -500,12 +500,12 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "SUNW,tcx");
+ dev = qdev_new("SUNW,tcx");
qdev_prop_set_uint32(dev, "vram_size", vram_size);
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
/* 10/ROM : FCode ROM */
@@ -552,12 +552,12 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, "cgthree");
+ dev = qdev_new("cgthree");
qdev_prop_set_uint32(dev, "vram-size", vram_size);
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
/* FCode ROM */
@@ -581,8 +581,8 @@ static void idreg_init(hwaddr addr)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, TYPE_MACIO_ID_REGISTER);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_MACIO_ID_REGISTER);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, addr);
@@ -647,8 +647,8 @@ static void afx_init(hwaddr addr)
DeviceState *dev;
SysBusDevice *s;
- dev = qdev_create(NULL, TYPE_TCX_AFX);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_TCX_AFX);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, addr);
@@ -708,8 +708,8 @@ static void prom_init(hwaddr addr, const char *bios_name)
char *filename;
int ret;
- dev = qdev_create(NULL, TYPE_OPENPROM);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_OPENPROM);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, addr);
@@ -877,9 +877,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
/* Create and map RAM frontend */
- dev = qdev_create(NULL, "memory");
+ dev = qdev_new("memory");
object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0);
/* models without ECC don't trap when missing ram is accessed */
@@ -982,7 +982,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
/* Slavio TTYA (base+4, Linux ttyS0) is the first QEMU serial device
Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device */
- dev = qdev_create(NULL, TYPE_ESCC);
+ dev = qdev_new(TYPE_ESCC);
qdev_prop_set_uint32(dev, "disabled", !machine->enable_graphics);
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
qdev_prop_set_uint32(dev, "it_shift", 1);
@@ -990,13 +990,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_chr(dev, "chrA", NULL);
qdev_prop_set_uint32(dev, "chnBtype", escc_mouse);
qdev_prop_set_uint32(dev, "chnAtype", escc_kbd);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, slavio_irq[14]);
sysbus_connect_irq(s, 1, slavio_irq[14]);
sysbus_mmio_map(s, 0, hwdef->ms_kb_base);
- dev = qdev_create(NULL, TYPE_ESCC);
+ dev = qdev_new(TYPE_ESCC);
qdev_prop_set_uint32(dev, "disabled", 0);
qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK);
qdev_prop_set_uint32(dev, "it_shift", 1);
@@ -1004,7 +1004,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_chr(dev, "chrA", serial_hd(0));
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_connect_irq(s, 0, slavio_irq[15]);
@@ -1062,13 +1062,13 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
ecc_init(hwdef->ecc_base, slavio_irq[28],
hwdef->ecc_version);
- dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
+ dev = qdev_new(TYPE_FW_CFG_MEM);
fw_cfg = FW_CFG(dev);
qdev_prop_set_uint32(dev, "data_width", 1);
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
OBJECT(fw_cfg));
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, CFG_ADDR);
sysbus_mmio_map(s, 1, CFG_ADDR + 2);