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authorAvi Kivity <avi@redhat.com>2011-11-14 11:55:27 +0200
committerAvi Kivity <avi@redhat.com>2011-11-24 18:32:00 +0200
commitd6c5f066ab6b81f82dfdac6082e5d4176783e5c9 (patch)
tree15d72920bdbcd8fbde02e4c1f50b7c16ba838200 /hw/sparc32_dma.c
parent00049a1221d755904817c2b79a06d4ac30150cbf (diff)
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sparc32_dma: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'hw/sparc32_dma.c')
-rw-r--r--hw/sparc32_dma.c31
1 files changed, 15 insertions, 16 deletions
diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c
index e75694b..7878820 100644
--- a/hw/sparc32_dma.c
+++ b/hw/sparc32_dma.c
@@ -64,6 +64,7 @@ typedef struct DMAState DMAState;
struct DMAState {
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t dmaregs[DMA_REGS];
qemu_irq irq;
void *iommu;
@@ -164,7 +165,8 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len)
s->dmaregs[1] += len;
}
-static uint32_t dma_mem_readl(void *opaque, target_phys_addr_t addr)
+static uint64_t dma_mem_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
DMAState *s = opaque;
uint32_t saddr;
@@ -180,7 +182,8 @@ static uint32_t dma_mem_readl(void *opaque, target_phys_addr_t addr)
return s->dmaregs[saddr];
}
-static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void dma_mem_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
{
DMAState *s = opaque;
uint32_t saddr;
@@ -234,16 +237,14 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
}
}
-static CPUReadMemoryFunc * const dma_mem_read[3] = {
- NULL,
- NULL,
- dma_mem_readl,
-};
-
-static CPUWriteMemoryFunc * const dma_mem_write[3] = {
- NULL,
- NULL,
- dma_mem_writel,
+static const MemoryRegionOps dma_mem_ops = {
+ .read = dma_mem_read,
+ .write = dma_mem_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
};
static void dma_reset(DeviceState *d)
@@ -268,15 +269,13 @@ static const VMStateDescription vmstate_dma = {
static int sparc32_dma_init1(SysBusDevice *dev)
{
DMAState *s = FROM_SYSBUS(DMAState, dev);
- int dma_io_memory;
int reg_size;
sysbus_init_irq(dev, &s->irq);
- dma_io_memory = cpu_register_io_memory(dma_mem_read, dma_mem_write, s,
- DEVICE_NATIVE_ENDIAN);
reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
- sysbus_init_mmio(dev, reg_size, dma_io_memory);
+ memory_region_init_io(&s->iomem, &dma_mem_ops, s, "dma", reg_size);
+ sysbus_init_mmio_region(dev, &s->iomem);
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
qdev_init_gpio_out(&dev->qdev, s->gpio, 2);