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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-07 18:49:57 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-07 18:49:57 +0000 |
commit | c6d86a33d36891bd5090ea72134b9854d6811173 (patch) | |
tree | 67fc4033db10455bf8fcc096de991c130c3a509a /hw/sh.h | |
parent | a4a771c055ea50f255f0d9a555c8628587afbea3 (diff) | |
download | qemu-c6d86a33d36891bd5090ea72134b9854d6811173.zip qemu-c6d86a33d36891bd5090ea72134b9854d6811173.tar.gz qemu-c6d86a33d36891bd5090ea72134b9854d6811173.tar.bz2 |
sh4: Add IRL (4-bit encoded interrupt input) support (Takashi YOSHII).
This patch adds IRL(4bit encoded 15 level interrupt input) support
to SH using qemu_irq as a multi level (!=on/off) signal.
Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5925 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/sh.h')
-rw-r--r-- | hw/sh.h | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -42,6 +42,9 @@ void sh_serial_init (target_phys_addr_t base, int feat, qemu_irq tei_source, qemu_irq bri_source); +/* sh7750.c */ +qemu_irq sh7750_irl(struct SH7750State *s); + /* tc58128.c */ int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); |