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| author | Keith Packard <keithp@keithp.com> | 2021-01-08 22:42:52 +0000 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2021-01-18 10:05:06 +0000 |
| commit | a10b9d93ecea0a8f01eb6de56274b1bcb101083b (patch) | |
| tree | 24d8b952a691501fa22791881425539e33535d5a /hw/semihosting/common-semi.h | |
| parent | 095f8c029319b79cce487e3b566cd826b93da3e6 (diff) | |
| download | qemu-a10b9d93ecea0a8f01eb6de56274b1bcb101083b.zip qemu-a10b9d93ecea0a8f01eb6de56274b1bcb101083b.tar.gz qemu-a10b9d93ecea0a8f01eb6de56274b1bcb101083b.tar.bz2 | |
riscv: Add semihosting support
Adapt the arm semihosting support code for RISCV. This implementation
is based on the standard for RISC-V semihosting version 0.2 as
documented in
https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20210107170717.2098982-6-keithp@keithp.com>
Message-Id: <20210108224256.2321-17-alex.bennee@linaro.org>
Diffstat (limited to 'hw/semihosting/common-semi.h')
| -rw-r--r-- | hw/semihosting/common-semi.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/semihosting/common-semi.h b/hw/semihosting/common-semi.h index bc53e92..0bfab1c 100644 --- a/hw/semihosting/common-semi.h +++ b/hw/semihosting/common-semi.h @@ -1,6 +1,6 @@ /* * Semihosting support for systems modeled on the Arm "Angel" - * semihosting syscalls design. + * semihosting syscalls design. This includes Arm and RISC-V processors * * Copyright (c) 2005, 2007 CodeSourcery. * Copyright (c) 2019 Linaro @@ -26,6 +26,9 @@ * Semihosting for AArch32 and AArch64 Release 2.0 * https://static.docs.arm.com/100863/0200/semihosting.pdf * + * RISC-V Semihosting is documented in: + * RISC-V Semihosting + * https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc */ #ifndef COMMON_SEMI_H |