diff options
author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2021-05-19 11:08:01 +0100 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-06-15 17:17:09 +0200 |
commit | e62a959afd2b1a13b27dda9d03f10c7feb36aa9b (patch) | |
tree | c44b4b480c2ad3455098c124c03a42a2a3feae81 /hw/scsi | |
parent | 6ef2cabc7c4231207cfbac326853c0242d9c4617 (diff) | |
download | qemu-e62a959afd2b1a13b27dda9d03f10c7feb36aa9b.zip qemu-e62a959afd2b1a13b27dda9d03f10c7feb36aa9b.tar.gz qemu-e62a959afd2b1a13b27dda9d03f10c7feb36aa9b.tar.bz2 |
esp: ensure PDMA write transfers are flushed from the FIFO to the target immediately
After each PDMA write transfer the MacOS CDROM driver waits until the FIFO is empty
(i.e. its contents have been written out to the SCSI bus) by polling the FIFO count
register until it reads 0. This doesn't work with the current PDMA write
implementation which waits until either the FIFO is full or the transfer is complete
before invoking the PDMA callback to process the FIFO contents.
Change the PDMA write transfer logic so that the PDMA callback is invoked after each
PDMA write to transfer the FIFO contents to the target buffer immediately, and hence
avoid getting stuck in the FIFO count register polling loop.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20210519100803.10293-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/scsi')
-rw-r--r-- | hw/scsi/esp.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index a0dab31..8e314ef 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -338,9 +338,9 @@ static void do_cmd(ESPState *s) static void satn_pdma_cb(ESPState *s) { - s->do_cmd = 0; - if (!fifo8_is_empty(&s->cmdfifo)) { + if (!esp_get_tc(s) && !fifo8_is_empty(&s->cmdfifo)) { s->cmdfifo_cdb_offset = 1; + s->do_cmd = 0; do_cmd(s); } } @@ -369,12 +369,9 @@ static void handle_satn(ESPState *s) static void s_without_satn_pdma_cb(ESPState *s) { - uint32_t len; - - s->do_cmd = 0; - len = fifo8_num_used(&s->cmdfifo); - if (len) { + if (!esp_get_tc(s) && !fifo8_is_empty(&s->cmdfifo)) { s->cmdfifo_cdb_offset = 0; + s->do_cmd = 0; do_busid_cmd(s, 0); } } @@ -403,8 +400,7 @@ static void handle_s_without_atn(ESPState *s) static void satn_stop_pdma_cb(ESPState *s) { - s->do_cmd = 0; - if (!fifo8_is_empty(&s->cmdfifo)) { + if (!esp_get_tc(s) && !fifo8_is_empty(&s->cmdfifo)) { trace_esp_handle_satn_stop(fifo8_num_used(&s->cmdfifo)); s->do_cmd = 1; s->cmdfifo_cdb_offset = 1; @@ -493,6 +489,11 @@ static void do_dma_pdma_cb(ESPState *s) uint32_t n; if (s->do_cmd) { + /* Ensure we have received complete command after SATN and stop */ + if (esp_get_tc(s) || fifo8_is_empty(&s->cmdfifo)) { + return; + } + s->ti_size = 0; s->do_cmd = 0; do_cmd(s); @@ -1220,7 +1221,6 @@ static void sysbus_esp_pdma_write(void *opaque, hwaddr addr, { SysBusESPState *sysbus = opaque; ESPState *s = ESP(&sysbus->esp); - uint32_t dmalen; trace_esp_pdma_write(size); @@ -1233,10 +1233,7 @@ static void sysbus_esp_pdma_write(void *opaque, hwaddr addr, esp_pdma_write(s, val); break; } - dmalen = esp_get_tc(s); - if (dmalen == 0 || fifo8_num_free(&s->fifo) < 2) { - s->pdma_cb(s); - } + s->pdma_cb(s); } static uint64_t sysbus_esp_pdma_read(void *opaque, hwaddr addr, |