aboutsummaryrefslogtreecommitdiff
path: root/hw/s390x/css.c
diff options
context:
space:
mode:
authorFei Li <sherrylf@linux.vnet.ibm.com>2017-02-17 15:40:41 +0800
committerChristian Borntraeger <borntraeger@de.ibm.com>2017-07-14 12:29:47 +0200
commit2283f4d67a0e05ae056d2077f65496c3c4df5d6f (patch)
treef7a5b032321f60bec43789b65a1c517f74df0666 /hw/s390x/css.c
parent1622ffd5151ad09c47785a380531ef1ebfc95be8 (diff)
downloadqemu-2283f4d67a0e05ae056d2077f65496c3c4df5d6f.zip
qemu-2283f4d67a0e05ae056d2077f65496c3c4df5d6f.tar.gz
qemu-2283f4d67a0e05ae056d2077f65496c3c4df5d6f.tar.bz2
s390x/sic: realize SIC handling
Currently, we do nothing for the SIC instruction, but we need to implement it properly. Let's add proper handling in the backend code. Co-authored-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Signed-off-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Signed-off-by: Fei Li <sherrylf@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Diffstat (limited to 'hw/s390x/css.c')
-rw-r--r--hw/s390x/css.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index 1fcbc84..7b82176 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -521,6 +521,32 @@ void css_conditional_io_interrupt(SubchDev *sch)
}
}
+int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode)
+{
+ S390FLICState *fs = s390_get_flic();
+ S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
+ int r;
+
+ if (env->psw.mask & PSW_MASK_PSTATE) {
+ r = -PGM_PRIVILEGED;
+ goto out;
+ }
+
+ trace_css_do_sic(mode, isc);
+ switch (mode) {
+ case SIC_IRQ_MODE_ALL:
+ case SIC_IRQ_MODE_SINGLE:
+ break;
+ default:
+ r = -PGM_OPERAND;
+ goto out;
+ }
+
+ r = fsc->modify_ais_mode(fs, isc, mode) ? -PGM_OPERATION : 0;
+out:
+ return r;
+}
+
void css_adapter_interrupt(uint8_t isc)
{
uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;