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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-10-12 13:46:02 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-11-07 11:02:17 +1000 |
| commit | 960b389b7d15f2ebb2b4d75d98d5ffec2c6a8348 (patch) | |
| tree | aa9f16afabca721974ce3a5ee8c56da6429dbf04 /hw/riscv | |
| parent | 12b12a14c73ee200c7cff42aab6113a0649fa132 (diff) | |
| download | qemu-960b389b7d15f2ebb2b4d75d98d5ffec2c6a8348.zip qemu-960b389b7d15f2ebb2b4d75d98d5ffec2c6a8348.tar.gz qemu-960b389b7d15f2ebb2b4d75d98d5ffec2c6a8348.tar.bz2 | |
target/riscv: rename ext_icsr to ext_zicsr
Add a leading 'z' to improve grepping. When one wants to search for uses
of zicsr they're more likely to do 'grep -i zicsr' than 'grep -i icsr'.
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Message-ID: <20231012164604.398496-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
| -rw-r--r-- | hw/riscv/boot.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 52bf8e6..0ffca05 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -414,7 +414,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts reset_vec[4] = 0x0182b283; /* ld t0, 24(t0) */ } - if (!harts->harts[0].cfg.ext_icsr) { + if (!harts->harts[0].cfg.ext_zicsr) { /* * The Zicsr extension has been disabled, so let's ensure we don't * run the CSR instruction. Let's fill the address with a non |