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authorAlistair Francis <alistair.francis@wdc.com>2018-05-11 10:24:00 -0700
committerAlistair Francis <alistair.francis@wdc.com>2018-07-05 15:24:25 -0700
commit98ceee7fdc04526b7c264823a14ef5977b90040a (patch)
treeae68a01b2242a12492ce1ff1cac34aa1c5c8aa44 /hw/riscv
parent2a1a6f6d47f192a12a3765a3558a11d619d25237 (diff)
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hw/riscv/sifive_u: Set the interrupt controller number of interrupts
Set the interrupt-controller ndev to the correct number taken from the HiFive Unleashed board. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael Clark <mjc@sifive.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/sifive_u.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index d3db8ab..4d3ba4e 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -187,7 +187,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
0x0, memmap[SIFIVE_U_PLIC].size);
qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control");
qemu_fdt_setprop_cell(fdt, nodename, "riscv,max-priority", 7);
- qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 4);
+ qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 0x35);
qemu_fdt_setprop_cells(fdt, nodename, "phandle", 2);
qemu_fdt_setprop_cells(fdt, nodename, "linux,phandle", 2);
plic_phandle = qemu_fdt_get_phandle(fdt, nodename);