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| author | Alistair Francis <alistair.francis@wdc.com> | 2021-10-22 16:01:31 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-10-28 14:39:23 +1000 |
| commit | 4e8fb53c0b58cbb18cd243a5b067e4f26db83f77 (patch) | |
| tree | 865884f268aa93d90952893e97159995aec30fc8 /hw/riscv | |
| parent | bf357e1d72cd8b7b590518dacdf4b65beb2c61e2 (diff) | |
| download | qemu-4e8fb53c0b58cbb18cd243a5b067e4f26db83f77.zip qemu-4e8fb53c0b58cbb18cd243a5b067e4f26db83f77.tar.gz qemu-4e8fb53c0b58cbb18cd243a5b067e4f26db83f77.tar.bz2 | |
hw/riscv: sifive_u: Use the PLIC config helper function
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20211022060133.3045020-3-alistair.francis@opensource.wdc.com
Diffstat (limited to 'hw/riscv')
| -rw-r--r-- | hw/riscv/sifive_u.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 0217006..589ae72 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -811,7 +811,6 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) MemoryRegion *mask_rom = g_new(MemoryRegion, 1); MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1); char *plic_hart_config; - size_t plic_hart_config_len; int i, j; NICInfo *nd = &nd_table[0]; @@ -852,18 +851,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) l2lim_mem); /* create PLIC hart topology configuration string */ - plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) * - ms->smp.cpus; - plic_hart_config = g_malloc0(plic_hart_config_len); - for (i = 0; i < ms->smp.cpus; i++) { - if (i != 0) { - strncat(plic_hart_config, "," SIFIVE_U_PLIC_HART_CONFIG, - plic_hart_config_len); - } else { - strncat(plic_hart_config, "M", plic_hart_config_len); - } - plic_hart_config_len -= (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1); - } + plic_hart_config = riscv_plic_hart_config_string(ms->smp.cpus); /* MMIO */ s->plic = sifive_plic_create(memmap[SIFIVE_U_DEV_PLIC].base, |