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| author | Bin Meng <bmeng.cn@gmail.com> | 2019-09-06 09:19:54 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-09-17 08:42:45 -0700 |
| commit | a2360c854fb56f9506d81be8b86ba577c0dbefc3 (patch) | |
| tree | d9d144cc02f62ab49e18c5a570d2025c81ba3786 /hw/riscv/sifive_uart.c | |
| parent | 9f79638ec55411d5d120a15bd2181cc862e4fba1 (diff) | |
| download | qemu-a2360c854fb56f9506d81be8b86ba577c0dbefc3.zip qemu-a2360c854fb56f9506d81be8b86ba577c0dbefc3.tar.gz qemu-a2360c854fb56f9506d81be8b86ba577c0dbefc3.tar.bz2 | |
riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead
Replace the call to hw_error() with qemu_log_mask(LOG_GUEST_ERROR,...)
in various sifive models.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv/sifive_uart.c')
| -rw-r--r-- | hw/riscv/sifive_uart.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/hw/riscv/sifive_uart.c b/hw/riscv/sifive_uart.c index 9de42b1..215990b 100644 --- a/hw/riscv/sifive_uart.c +++ b/hw/riscv/sifive_uart.c @@ -18,6 +18,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/log.h" #include "hw/sysbus.h" #include "chardev/char.h" #include "chardev/char-fe.h" @@ -95,8 +96,8 @@ uart_read(void *opaque, hwaddr addr, unsigned int size) return s->div; } - hw_error("%s: bad read: addr=0x%x\n", - __func__, (int)addr); + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad read: addr=0x%x\n", + __func__, (int)addr); return 0; } @@ -127,8 +128,8 @@ uart_write(void *opaque, hwaddr addr, s->div = val64; return; } - hw_error("%s: bad write: addr=0x%x v=0x%x\n", - __func__, (int)addr, (int)value); + qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%x v=0x%x\n", + __func__, (int)addr, (int)value); } static const MemoryRegionOps uart_ops = { |