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| author | Bin Meng <bmeng.cn@gmail.com> | 2019-09-06 09:20:11 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-09-17 08:42:48 -0700 |
| commit | 806c64b7b0e782b7f1414478486c67df718a0f00 (patch) | |
| tree | 32ee474aa0909e1e9f379f781683f386852152fd /hw/riscv/sifive_u.c | |
| parent | af14c840418bee1b22e5b1bc403dcc8c69492517 (diff) | |
| download | qemu-806c64b7b0e782b7f1414478486c67df718a0f00.zip qemu-806c64b7b0e782b7f1414478486c67df718a0f00.tar.gz qemu-806c64b7b0e782b7f1414478486c67df718a0f00.tar.bz2 | |
riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes
Now that we have added a PRCI node, update existing UART and ethernet
nodes to reference PRCI as their clock sources, to keep in sync with
the Linux kernel device tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv/sifive_u.c')
| -rw-r--r-- | hw/riscv/sifive_u.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index f6b868f4..9e698a1 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -78,7 +78,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, int cpu; uint32_t *cells; char *nodename; - char ethclk_names[] = "pclk\0hclk\0tx_clk"; + char ethclk_names[] = "pclk\0hclk"; uint32_t plic_phandle, prci_phandle, ethclk_phandle, phandle = 1; uint32_t uartclk_phandle; uint32_t hfclk_phandle, rtcclk_phandle; @@ -263,7 +263,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); qemu_fdt_setprop_cells(fdt, nodename, "clocks", - ethclk_phandle, ethclk_phandle, ethclk_phandle); + prci_phandle, PRCI_CLK_GEMGXLPLL, prci_phandle, PRCI_CLK_GEMGXLPLL); qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names, sizeof(ethclk_names)); qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); @@ -293,7 +293,8 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0, memmap[SIFIVE_U_UART0].base, 0x0, memmap[SIFIVE_U_UART0].size); - qemu_fdt_setprop_cell(fdt, nodename, "clocks", uartclk_phandle); + qemu_fdt_setprop_cells(fdt, nodename, "clocks", + prci_phandle, PRCI_CLK_TLCLK); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); |