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authorAnup Patel <anup.patel@wdc.com>2020-02-02 19:12:17 +0530
committerPalmer Dabbelt <palmerdabbelt@google.com>2020-02-27 13:46:37 -0800
commit5f3616ccceb5d5c49f99838c78498e581fb42fc5 (patch)
treed44d99603f2329c984d4d9d2ba3ffccab382b50a /hw/riscv/sifive_u.c
parentc695724868ce4049fd79c5a509880dbdf171e744 (diff)
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hw/riscv: Provide rdtime callback for TCG in CLINT emulation
This patch extends CLINT emulation to provide rdtime callback for TCG. This rdtime callback will be called wheneven TIME CSRs are read in privileged modes. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'hw/riscv/sifive_u.c')
-rw-r--r--hw/riscv/sifive_u.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 0e12b3c..156a003 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -549,7 +549,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
serial_hd(1), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART1_IRQ));
sifive_clint_create(memmap[SIFIVE_U_CLINT].base,
memmap[SIFIVE_U_CLINT].size, ms->smp.cpus,
- SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
+ SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false);
object_property_set_bool(OBJECT(&s->prci), true, "realized", &err);
sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_PRCI].base);