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author | Alistair Francis <alistair.francis@wdc.com> | 2019-06-24 15:11:49 -0700 |
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committer | Palmer Dabbelt <palmer@sifive.com> | 2019-06-27 02:47:06 -0700 |
commit | 0ac24d56c5e7d32423ea78ac58a06b444d1df04d (patch) | |
tree | f92aa46bc262c12a463f5896afa8e885502956e5 /hw/riscv/boot.c | |
parent | 05446f4133ea1fe4b444ba80a823fc1df1a9eeaf (diff) | |
download | qemu-0ac24d56c5e7d32423ea78ac58a06b444d1df04d.zip qemu-0ac24d56c5e7d32423ea78ac58a06b444d1df04d.tar.gz qemu-0ac24d56c5e7d32423ea78ac58a06b444d1df04d.tar.bz2 |
hw/riscv: Split out the boot functions
Split the common RISC-V boot functions into a seperate file. This allows
us to share the common code.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv/boot.c')
-rw-r--r-- | hw/riscv/boot.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c new file mode 100644 index 0000000..0c8e72e --- /dev/null +++ b/hw/riscv/boot.c @@ -0,0 +1,69 @@ +/* + * QEMU RISC-V Boot Helper + * + * Copyright (c) 2017 SiFive, Inc. + * Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "qemu/error-report.h" +#include "exec/cpu-defs.h" +#include "hw/loader.h" +#include "hw/riscv/boot.h" +#include "elf.h" + +target_ulong riscv_load_kernel(const char *kernel_filename) +{ + uint64_t kernel_entry, kernel_high; + + if (load_elf(kernel_filename, NULL, NULL, NULL, + &kernel_entry, NULL, &kernel_high, 0, EM_RISCV, 1, 0) < 0) { + error_report("could not load kernel '%s'", kernel_filename); + exit(1); + } + + return kernel_entry; +} + +hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, + uint64_t kernel_entry, hwaddr *start) +{ + int size; + + /* + * We want to put the initrd far enough into RAM that when the + * kernel is uncompressed it will not clobber the initrd. However + * on boards without much RAM we must ensure that we still leave + * enough room for a decent sized initrd, and on boards with large + * amounts of RAM we must avoid the initrd being so far up in RAM + * that it is outside lowmem and inaccessible to the kernel. + * So for boards with less than 256MB of RAM we put the initrd + * halfway into RAM, and for boards with 256MB of RAM or more we put + * the initrd at 128MB. + */ + *start = kernel_entry + MIN(mem_size / 2, 128 * MiB); + + size = load_ramdisk(filename, *start, mem_size - *start); + if (size == -1) { + size = load_image_targphys(filename, *start, mem_size - *start); + if (size == -1) { + error_report("could not load ramdisk '%s'", filename); + exit(1); + } + } + + return *start + size; +} |