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authormalc <av1474@comtv.ru>2009-10-01 22:20:47 +0400
committermalc <av1474@comtv.ru>2009-10-01 22:45:02 +0400
commit99a0949b720a0936da2052cb9a46db04ffc6db29 (patch)
treef9e39633853e35b49fc4465337cc196b9650866e /hw/pxa2xx_pic.c
parentbc6291a1b95a2c4c546fde6e5cb4c68366f06649 (diff)
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Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'hw/pxa2xx_pic.c')
-rw-r--r--hw/pxa2xx_pic.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index 0a98342..c84d02f 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -113,7 +113,7 @@ static inline uint32_t pxa2xx_pic_highest(PXA2xxPICState *s) {
return ichp;
}
-static uint32_t pxa2xx_pic_mem_read(void *opaque, target_phys_addr_t offset)
+static uint32_t pxa2xx_pic_mem_read(void *opaque, a_target_phys_addr offset)
{
PXA2xxPICState *s = (PXA2xxPICState *) opaque;
@@ -152,7 +152,7 @@ static uint32_t pxa2xx_pic_mem_read(void *opaque, target_phys_addr_t offset)
}
}
-static void pxa2xx_pic_mem_write(void *opaque, target_phys_addr_t offset,
+static void pxa2xx_pic_mem_write(void *opaque, a_target_phys_addr offset,
uint32_t value)
{
PXA2xxPICState *s = (PXA2xxPICState *) opaque;
@@ -204,7 +204,7 @@ static const int pxa2xx_cp_reg_map[0x10] = {
static uint32_t pxa2xx_pic_cp_read(void *opaque, int op2, int reg, int crm)
{
- target_phys_addr_t offset;
+ a_target_phys_addr offset;
if (pxa2xx_cp_reg_map[reg] == -1) {
printf("%s: Bad register 0x%x\n", __FUNCTION__, reg);
@@ -218,7 +218,7 @@ static uint32_t pxa2xx_pic_cp_read(void *opaque, int op2, int reg, int crm)
static void pxa2xx_pic_cp_write(void *opaque, int op2, int reg, int crm,
uint32_t value)
{
- target_phys_addr_t offset;
+ a_target_phys_addr offset;
if (pxa2xx_cp_reg_map[reg] == -1) {
printf("%s: Bad register 0x%x\n", __FUNCTION__, reg);
@@ -276,7 +276,7 @@ static int pxa2xx_pic_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
-qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env)
+qemu_irq *pxa2xx_pic_init(a_target_phys_addr base, CPUState *env)
{
PXA2xxPICState *s;
int iomemtype;