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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-17 18:43:47 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-17 18:43:47 +0000
commite1dad5a615fb4a2d5cd43cbc0fc42f6a0d35f2e9 (patch)
tree683799618318bd70cc7505aa14d604ff164c0c01 /hw/pxa2xx_mmci.c
parent749bc4bf0bcd36e38b86d75a98f287f1941394cb (diff)
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Better STOPINTR bit semantics in the PXA2xx DMA.
Don't error out on reading GPCR register, just warn (Thorsten Zitterell). Don't zero a memory that's already zeroed. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3676 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pxa2xx_mmci.c')
-rw-r--r--hw/pxa2xx_mmci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pxa2xx_mmci.c b/hw/pxa2xx_mmci.c
index 6e244a9..9d26b79 100644
--- a/hw/pxa2xx_mmci.c
+++ b/hw/pxa2xx_mmci.c
@@ -549,5 +549,5 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly,
qemu_irq coverswitch)
{
- sd_set_cb(s->card, read, coverswitch);
+ sd_set_cb(s->card, readonly, coverswitch);
}