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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-09-24 17:01:44 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2006-09-24 17:01:44 +0000
commit80b3ada7dd56088613a446934d144a747e740fa1 (patch)
tree3dc8bf29b3bee0c06772b56e5add4a7d5df2de23 /hw/prep_pci.c
parentd2b5931756fdb9f839180e33898cd1e3e4fbdc90 (diff)
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Implement sun4u PCI IRQ routing.
Allow multiple PCI busses and PCI-PCI bridges. Fix bugs in Versatile PCI implementation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2166 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/prep_pci.c')
-rw-r--r--hw/prep_pci.c12
1 files changed, 3 insertions, 9 deletions
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index b5ff8eb..3d93c06 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -120,18 +120,12 @@ static CPUReadMemoryFunc *PPC_PCIIO_read[] = {
/* Don't know if this matches real hardware, but it agrees with OHW. */
static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
{
- return (irq_num + (pci_dev->devfn >> 3)) & 3;
+ return (irq_num + (pci_dev->devfn >> 3)) & 1;
}
-static int prep_irq_levels[4];
-
static void prep_set_irq(void *pic, int irq_num, int level)
{
- int pic_irq_num;
- prep_irq_levels[irq_num] = level;
- level |= prep_irq_levels[irq_num ^ 2];
- pic_irq_num = (irq_num == 0 || irq_num == 2) ? 9 : 11;
- pic_set_irq(pic_irq_num, level);
+ pic_set_irq(irq_num ? 11 : 9, level);
}
PCIBus *pci_prep_init(void)
@@ -141,7 +135,7 @@ PCIBus *pci_prep_init(void)
int PPC_io_memory;
s = qemu_mallocz(sizeof(PREPPCIState));
- s->bus = pci_register_bus(prep_set_irq, prep_map_irq, NULL, 0);
+ s->bus = pci_register_bus(prep_set_irq, prep_map_irq, NULL, 0, 2);
register_ioport_write(0xcf8, 4, 4, pci_prep_addr_writel, s);
register_ioport_read(0xcf8, 4, 4, pci_prep_addr_readl, s);