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author | Andreas Färber <andreas.faerber@web.de> | 2012-01-07 08:28:53 +0100 |
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committer | Andreas Färber <andreas.faerber@web.de> | 2012-01-20 00:27:12 +0100 |
commit | 7e5610ff72b0d12feb24d1e973e4be303f422eb6 (patch) | |
tree | 65aa356dd54b25fd839b27eb4254829f54c5b898 /hw/prep_pci.c | |
parent | 9c95f183fbac16dfaefab4a023e80fdfae273a76 (diff) | |
download | qemu-7e5610ff72b0d12feb24d1e973e4be303f422eb6.zip qemu-7e5610ff72b0d12feb24d1e973e4be303f422eb6.tar.gz qemu-7e5610ff72b0d12feb24d1e973e4be303f422eb6.tar.bz2 |
prep_pci: Update I/O to MemoryRegion ops
Convert to new-style read/write callbacks.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Cc: Alexander Graf <agraf@suse.de>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Avi Kivity <avi@redhat.com>
Cc: Benoît Canet <benoit.canet@gmail.com>
Diffstat (limited to 'hw/prep_pci.c')
-rw-r--r-- | hw/prep_pci.c | 46 |
1 files changed, 8 insertions, 38 deletions
diff --git a/hw/prep_pci.c b/hw/prep_pci.c index edfb25d..2600e26 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -44,53 +44,23 @@ static inline uint32_t PPC_PCIIO_config(target_phys_addr_t addr) return (addr & 0x7ff) | (i << 11); } -static void PPC_PCIIO_writeb (void *opaque, target_phys_addr_t addr, uint32_t val) +static void ppc_pci_io_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned int size) { PREPPCIState *s = opaque; - pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 1); + pci_data_write(s->bus, PPC_PCIIO_config(addr), val, size); } -static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr, uint32_t val) +static uint64_t ppc_pci_io_read(void *opaque, target_phys_addr_t addr, + unsigned int size) { PREPPCIState *s = opaque; - pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2); -} - -static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr, uint32_t val) -{ - PREPPCIState *s = opaque; - pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4); -} - -static uint32_t PPC_PCIIO_readb (void *opaque, target_phys_addr_t addr) -{ - PREPPCIState *s = opaque; - uint32_t val; - val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 1); - return val; -} - -static uint32_t PPC_PCIIO_readw (void *opaque, target_phys_addr_t addr) -{ - PREPPCIState *s = opaque; - uint32_t val; - val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2); - return val; -} - -static uint32_t PPC_PCIIO_readl (void *opaque, target_phys_addr_t addr) -{ - PREPPCIState *s = opaque; - uint32_t val; - val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4); - return val; + return pci_data_read(s->bus, PPC_PCIIO_config(addr), size); } static const MemoryRegionOps PPC_PCIIO_ops = { - .old_mmio = { - .read = { PPC_PCIIO_readb, PPC_PCIIO_readw, PPC_PCIIO_readl, }, - .write = { PPC_PCIIO_writeb, PPC_PCIIO_writew, PPC_PCIIO_writel, }, - }, + .read = ppc_pci_io_read, + .write = ppc_pci_io_write, .endianness = DEVICE_LITTLE_ENDIAN, }; |