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author | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-01 16:12:16 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-01 16:12:16 -0500 |
commit | c227f0995e1722a1abccc28cadf0664266bd8043 (patch) | |
tree | 39e92c2f818e3e8144978740b914731613af0e40 /hw/ppce500_pci.c | |
parent | 99a0949b720a0936da2052cb9a46db04ffc6db29 (diff) | |
download | qemu-c227f0995e1722a1abccc28cadf0664266bd8043.zip qemu-c227f0995e1722a1abccc28cadf0664266bd8043.tar.gz qemu-c227f0995e1722a1abccc28cadf0664266bd8043.tar.bz2 |
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ppce500_pci.c')
-rw-r--r-- | hw/ppce500_pci.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index ae438d8..64fccfd 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -17,7 +17,7 @@ #include "hw.h" #include "ppc.h" #include "ppce500.h" -typedef a_target_phys_addr a_pci_addr; +typedef target_phys_addr_t pci_addr_t; #include "pci.h" #include "pci_host.h" #include "bswap.h" @@ -85,7 +85,7 @@ struct PPCE500PCIState { typedef struct PPCE500PCIState PPCE500PCIState; -static uint32_t pcie500_cfgaddr_readl(void *opaque, a_target_phys_addr addr) +static uint32_t pcie500_cfgaddr_readl(void *opaque, target_phys_addr_t addr) { PPCE500PCIState *pci = opaque; @@ -100,7 +100,7 @@ static CPUReadMemoryFunc * const pcie500_cfgaddr_read[] = { &pcie500_cfgaddr_readl, }; -static void pcie500_cfgaddr_writel(void *opaque, a_target_phys_addr addr, +static void pcie500_cfgaddr_writel(void *opaque, target_phys_addr_t addr, uint32_t value) { PPCE500PCIState *controller = opaque; @@ -128,7 +128,7 @@ static CPUWriteMemoryFunc * const pcie500_cfgdata_write[] = { &pci_host_data_writel, }; -static uint32_t pci_reg_read4(void *opaque, a_target_phys_addr addr) +static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr) { PPCE500PCIState *pci = opaque; unsigned long win; @@ -181,7 +181,7 @@ static CPUReadMemoryFunc * const e500_pci_reg_read[] = { &pci_reg_read4, }; -static void pci_reg_write4(void *opaque, a_target_phys_addr addr, +static void pci_reg_write4(void *opaque, target_phys_addr_t addr, uint32_t value) { PPCE500PCIState *pci = opaque; @@ -313,7 +313,7 @@ static int ppce500_pci_load(QEMUFile *f, void *opaque, int version_id) return 0; } -PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], a_target_phys_addr registers) +PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers) { PPCE500PCIState *controller; PCIDevice *d; |