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| author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-30 09:38:04 +0000 |
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| committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-30 09:38:04 +0000 |
| commit | 471035729088e3aa7f69140ac0ad0b248ff7ec07 (patch) | |
| tree | fe468ba8c22505dcdc9c5f41d8a83f2cda77f8ad /hw/ppc_prep.c | |
| parent | de270b3c7c0c9b15e6c2f3d5e7f5c96673711dad (diff) | |
| download | qemu-471035729088e3aa7f69140ac0ad0b248ff7ec07.zip qemu-471035729088e3aa7f69140ac0ad0b248ff7ec07.tar.gz qemu-471035729088e3aa7f69140ac0ad0b248ff7ec07.tar.bz2 | |
New model for PowerPC CPU hardware interrupt events:
move all PowerPC specific code into target-ppc/helper.c to avoid polluting
the common code in cpu-exec.c. This makes implementation of new features
(ie embedded PowerPC timers, critical interrupts, ...) easier.
This also avoid hardcoding the IRQ callback in the OpenPIC controller,
making it more easily reusable and allowing cascading.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2542 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/ppc_prep.c')
| -rw-r--r-- | hw/ppc_prep.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c index 32a3e52..d504b1c 100644 --- a/hw/ppc_prep.c +++ b/hw/ppc_prep.c @@ -1,7 +1,7 @@ /* * QEMU PPC PREP hardware System Emulator * - * Copyright (c) 2003-2004 Jocelyn Mayer + * Copyright (c) 2003-2007 Jocelyn Mayer * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -84,29 +84,27 @@ static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val) #endif } -static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) +static uint32_t speaker_ioport_read (void *opaque, uint32_t addr) { #if 0 int out; out = pit_get_out(pit, 2, qemu_get_clock(vm_clock)); dummy_refresh_clock ^= 1; return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) | - (dummy_refresh_clock << 4); + (dummy_refresh_clock << 4); #endif return 0; } -static void pic_irq_request(void *opaque, int level) +static void pic_irq_request (void *opaque, int level) { - if (level) - cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); - else - cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD); + ppc_set_irq(opaque, PPC_INTERRUPT_EXT, level); } /* PCI intack register */ /* Read-only register (?) */ -static void _PPC_intack_write (void *opaque, target_phys_addr_t addr, uint32_t value) +static void _PPC_intack_write (void *opaque, + target_phys_addr_t addr, uint32_t value) { // printf("%s: 0x%08x => 0x%08x\n", __func__, addr, value); } @@ -294,7 +292,7 @@ static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val) /* Special port 92 */ /* Check soft reset asked */ if (val & 0x01) { - // cpu_interrupt(first_cpu, CPU_INTERRUPT_RESET); + // cpu_interrupt(first_cpu, PPC_INTERRUPT_RESET); } /* Check LE mode */ if (val & 0x02) { |