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author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-09 22:45:36 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-09 22:45:36 +0000 |
commit | e9df014c0b433ecd9785db4a423e472bc3db386a (patch) | |
tree | e16e40d4fd68aff979be0d8e57ffdc17ee108ca7 /hw/ppc_chrp.c | |
parent | 682c4f15598fa82eb00973b9b14be86d1e5a726c (diff) | |
download | qemu-e9df014c0b433ecd9785db4a423e472bc3db386a.zip qemu-e9df014c0b433ecd9785db4a423e472bc3db386a.tar.gz qemu-e9df014c0b433ecd9785db4a423e472bc3db386a.tar.bz2 |
Implement embedded IRQ controller for PowerPC 6xx/740 & 750.
Fix PowerPC external interrupt input handling and lowering.
Fix OpenPIC output pins management.
Fix multiples bugs in OpenPIC IRQ management.
Fix OpenPIC CPU(s) reset function.
Fix Mac99 machine to properly route OpenPIC outputs to the PowerPC input pins.
Fix PREP machine to properly route i8259 output to the PowerPC external
interrupt pin.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2647 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/ppc_chrp.c')
-rw-r--r-- | hw/ppc_chrp.c | 42 |
1 files changed, 32 insertions, 10 deletions
diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index 18a1aab..c418cd1 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -23,6 +23,9 @@ */ #include "vl.h" +/* SMP is not enabled, for now */ +#define MAX_CPUS 1 + #define BIOS_FILENAME "ppc_rom.bin" #define VGABIOS_FILENAME "video.x" #define NVRAM_SIZE 0x2000 @@ -296,9 +299,9 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, const char *cpu_model, int is_heathrow) { - CPUState *env; + CPUState *env, *envs[MAX_CPUS]; char buf[1024]; - qemu_irq *pic; + qemu_irq *pic, **openpic_irqs; m48t59_t *nvram; int unin_memory; int linux_boot, i; @@ -329,13 +332,13 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, if (def == NULL) { cpu_abort(env, "Unable to find PowerPC CPU definition\n"); } - cpu_ppc_register(env, def); - cpu_ppc_irq_init_cpu(env); - - /* Set time-base frequency to 100 Mhz */ - cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); - - env->osi_call = vga_osi_call; + for (i = 0; i < smp_cpus; i++) { + cpu_ppc_register(env, def); + /* Set time-base frequency to 100 Mhz */ + cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); + env->osi_call = vga_osi_call; + envs[i] = env; + } /* allocate RAM */ cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); @@ -458,7 +461,26 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device, unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL); cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); - pic = openpic_init(NULL, &ppc_openpic_irq, &openpic_mem_index, 1, &env); + openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *)); + openpic_irqs[0] = + qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); + for (i = 0; i < smp_cpus; i++) { + /* Mac99 IRQ connection between OpenPIC outputs pins + * and PowerPC input pins + */ + openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); + openpic_irqs[i][OPENPIC_OUTPUT_INT] = + ((qemu_irq *)env->irq_inputs)[PPC_INPUT_INT]; + openpic_irqs[i][OPENPIC_OUTPUT_CINT] = + ((qemu_irq *)env->irq_inputs)[PPC_INPUT_INT]; + openpic_irqs[i][OPENPIC_OUTPUT_MCK] = + ((qemu_irq *)env->irq_inputs)[PPC_INPUT_MCP]; + openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; /* Not connected ? */ + openpic_irqs[i][OPENPIC_OUTPUT_RESET] = + ((qemu_irq *)env->irq_inputs)[PPC_INPUT_HRESET]; /* Check this */ + } + pic = openpic_init(NULL, &openpic_mem_index, smp_cpus, + openpic_irqs, NULL); pci_bus = pci_pmac_init(pic); /* init basic PC hardware */ pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, |