diff options
| author | Greg Kurz <groug@kaod.org> | 2020-01-06 15:56:39 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-01-08 11:01:59 +1100 |
| commit | 764f9b2559f0dac7d24da2920445a42a5edf158b (patch) | |
| tree | c3ac869213fd8192914e3c9a778225f81017b79b /hw/ppc | |
| parent | 53981dd50566288904c03e5e7d31b43bc587cb37 (diff) | |
| download | qemu-764f9b2559f0dac7d24da2920445a42a5edf158b.zip qemu-764f9b2559f0dac7d24da2920445a42a5edf158b.tar.gz qemu-764f9b2559f0dac7d24da2920445a42a5edf158b.tar.bz2 | |
ppc/pnv: Add an "nr-threads" property to the base chip class
Set it at chip creation and forward it to the cores. This allows to drop
a call to qdev_get_machine().
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20200106145645.4539-7-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
| -rw-r--r-- | hw/ppc/pnv.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ead92d5..6a0aa78 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -802,6 +802,8 @@ static void pnv_init(MachineState *machine) &error_fatal); object_property_set_int(chip, machine->smp.cores, "nr-cores", &error_fatal); + object_property_set_int(chip, machine->smp.threads, + "nr-threads", &error_fatal); /* * The POWER8 machine use the XICS interrupt interface. * Propagate the XICS fabric to the chip and its controllers. @@ -1526,7 +1528,6 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp) static void pnv_chip_core_realize(PnvChip *chip, Error **errp) { - MachineState *ms = MACHINE(qdev_get_machine()); Error *error = NULL; PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip); const char *typename = pnv_chip_core_typename(chip); @@ -1562,8 +1563,8 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp) object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core), &error_abort); chip->cores[i] = pnv_core; - object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads", - &error_fatal); + object_property_set_int(OBJECT(pnv_core), chip->nr_threads, + "nr-threads", &error_fatal); object_property_set_int(OBJECT(pnv_core), core_hwid, CPU_CORE_PROP_CORE_ID, &error_fatal); object_property_set_int(OBJECT(pnv_core), @@ -1602,6 +1603,7 @@ static Property pnv_chip_properties[] = { DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0), DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1), DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0), + DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1), DEFINE_PROP_END_OF_LIST(), }; |