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author | David Gibson <david@gibson.dropbear.id.au> | 2017-03-02 12:13:07 +1100 |
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committer | David Gibson <david@gibson.dropbear.id.au> | 2017-03-03 11:30:59 +1100 |
commit | 0922f1e4872656f7643fb2bc8459bea6964de085 (patch) | |
tree | 99030a4a7ad4fa6d21347e3fd2a6dcd72ddbdcb3 /hw/ppc | |
parent | eaa477ca4ef59eed2c77d81937b981ff823def3b (diff) | |
download | qemu-0922f1e4872656f7643fb2bc8459bea6964de085.zip qemu-0922f1e4872656f7643fb2bc8459bea6964de085.tar.gz qemu-0922f1e4872656f7643fb2bc8459bea6964de085.tar.bz2 |
target/ppc/POWER9: Add POWERPC_MMU_V3 bit
For easier handling of future processors using the POWER9 or something
close to it, add a new bit in the MMU model. This was originally from a
revised version of 86cf1e9 "target/ppc/POWER9: Add ISAv3.00 MMU definition"
but the older version of the patch was already merged. This makes the
change on top of the original version.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
0 files changed, 0 insertions, 0 deletions