diff options
author | Cédric Le Goater <clg@kaod.org> | 2018-01-15 19:04:04 +0100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2018-01-17 09:35:24 +1100 |
commit | c035851ac0584e1491f6d0fa28d92a8c7a872362 (patch) | |
tree | 2211f3edf3928fe127f1f40a9b21732083feaa82 /hw/ppc | |
parent | b3b066e9d8640a5d143cf9241e00160f30d9a89d (diff) | |
download | qemu-c035851ac0584e1491f6d0fa28d92a8c7a872362.zip qemu-c035851ac0584e1491f6d0fa28d92a8c7a872362.tar.gz qemu-c035851ac0584e1491f6d0fa28d92a8c7a872362.tar.bz2 |
ppc/pnv: fix XSCOM core addressing on POWER9
The XSCOM base address of the core chiplet was wrongly calculated. Use
the OPAL macros to fix that and do a couple of renames.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
-rw-r--r-- | hw/ppc/pnv.c | 15 | ||||
-rw-r--r-- | hw/ppc/pnv_core.c | 2 |
2 files changed, 9 insertions, 8 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index f9591cd..80245f5 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -721,7 +721,6 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) k->cores_mask = POWER8E_CORE_MASK; k->core_pir = pnv_chip_core_pir_p8; k->xscom_base = 0x003fc0000000000ull; - k->xscom_core_base = 0x10000000ull; dc->desc = "PowerNV Chip POWER8E"; } @@ -735,7 +734,6 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) k->cores_mask = POWER8_CORE_MASK; k->core_pir = pnv_chip_core_pir_p8; k->xscom_base = 0x003fc0000000000ull; - k->xscom_core_base = 0x10000000ull; dc->desc = "PowerNV Chip POWER8"; } @@ -749,7 +747,6 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) k->cores_mask = POWER8_CORE_MASK; k->core_pir = pnv_chip_core_pir_p8; k->xscom_base = 0x003fc0000000000ull; - k->xscom_core_base = 0x10000000ull; dc->desc = "PowerNV Chip POWER8NVL"; } @@ -763,7 +760,6 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) k->cores_mask = POWER9_CORE_MASK; k->core_pir = pnv_chip_core_pir_p9; k->xscom_base = 0x00603fc00000000ull; - k->xscom_core_base = 0x0ull; dc->desc = "PowerNV Chip POWER9"; } @@ -887,6 +883,7 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) && (i < chip->nr_cores); core_hwid++) { char core_name[32]; void *pnv_core = chip->cores + i * typesize; + uint64_t xscom_core_base; if (!(chip->cores_mask & (1ull << core_hwid))) { continue; @@ -910,9 +907,13 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp) object_unref(OBJECT(pnv_core)); /* Each core has an XSCOM MMIO region */ - pnv_xscom_add_subregion(chip, - PNV_XSCOM_EX_CORE_BASE(pcc->xscom_core_base, - core_hwid), + if (!pnv_chip_is_power9(chip)) { + xscom_core_base = PNV_XSCOM_EX_BASE(core_hwid); + } else { + xscom_core_base = PNV_XSCOM_P9_EC_BASE(core_hwid); + } + + pnv_xscom_add_subregion(chip, xscom_core_base, &PNV_CORE(pnv_core)->xscom_regs); i++; } diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 7e8a76d..cbb64ad 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -192,7 +192,7 @@ static void pnv_core_realize(DeviceState *dev, Error **errp) snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id); pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), &pnv_core_xscom_ops, - pc, name, PNV_XSCOM_EX_CORE_SIZE); + pc, name, PNV_XSCOM_EX_SIZE); return; err: |