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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-15 22:59:34 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-15 22:59:34 +0000
commit61b244050334f88de5bed0c8cd8af8503aaa0931 (patch)
tree334ac6f9a33853cdaf3c630fccb04ff90894553c /hw/ppc4xx.h
parentf5d6f51ba66aad038f1bc4436582761015838438 (diff)
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target-ppc: move PPC4xx SDRAM controller emulation from ppc405_uc.c to ppc4xx_devs.c
The SDRAM controller is shared across almost all 405 and 440 embedded processors, with some slight differences such as the sizes supported for each memory bank. Code movement only; no functional changes. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6061 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/ppc4xx.h')
-rw-r--r--hw/ppc4xx.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/ppc4xx.h b/hw/ppc4xx.h
index 88802ae..8c2878a 100644
--- a/hw/ppc4xx.h
+++ b/hw/ppc4xx.h
@@ -48,6 +48,11 @@ enum {
qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs,
uint32_t dcr_base, int has_ssr, int has_vr);
+void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
+ target_phys_addr_t *ram_bases,
+ target_phys_addr_t *ram_sizes,
+ int do_init);
+
PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
target_phys_addr_t config_space,
target_phys_addr_t int_ack,