diff options
| author | Avi Kivity <avi@redhat.com> | 2011-08-15 17:17:27 +0300 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2011-08-22 10:47:42 -0500 |
| commit | b6dcbe086c77ec683f5ff0b693593cda1d61f3a1 (patch) | |
| tree | 4db9e86c6c9f303d4496af5d98533cf051000650 /hw/ppc440.c | |
| parent | 9074e0e3e8b087fcc14b0ae76fb240ae9872e70c (diff) | |
| download | qemu-b6dcbe086c77ec683f5ff0b693593cda1d61f3a1.zip qemu-b6dcbe086c77ec683f5ff0b693593cda1d61f3a1.tar.gz qemu-b6dcbe086c77ec683f5ff0b693593cda1d61f3a1.tar.bz2 | |
ppc4xx_sdram: convert to memory API
Clumsy due to the lack of clipping support, needed for
changing exposed ram size.
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ppc440.c')
| -rw-r--r-- | hw/ppc440.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/hw/ppc440.c b/hw/ppc440.c index baf991f..5885ff0 100644 --- a/hw/ppc440.c +++ b/hw/ppc440.c @@ -38,6 +38,8 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip, const unsigned int pci_irq_nrs[4], int do_init, const char *cpu_model) { + MemoryRegion *ram_memories + = g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories)); target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS]; target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS]; CPUState *env; @@ -66,11 +68,12 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip, memset(ram_bases, 0, sizeof(ram_bases)); memset(ram_sizes, 0, sizeof(ram_sizes)); *ram_size = ppc4xx_sdram_adjust(*ram_size, PPC440EP_SDRAM_NR_BANKS, + ram_memories, ram_bases, ram_sizes, ppc440ep_sdram_bank_sizes); /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ - ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_bases, - ram_sizes, do_init); + ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories, + ram_bases, ram_sizes, do_init); /* PCI */ pci_irqs = g_malloc(sizeof(qemu_irq) * 4); |