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author | Avi Kivity <avi@redhat.com> | 2011-08-15 17:17:27 +0300 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2011-08-22 10:47:42 -0500 |
commit | b6dcbe086c77ec683f5ff0b693593cda1d61f3a1 (patch) | |
tree | 4db9e86c6c9f303d4496af5d98533cf051000650 /hw/ppc405.h | |
parent | 9074e0e3e8b087fcc14b0ae76fb240ae9872e70c (diff) | |
download | qemu-b6dcbe086c77ec683f5ff0b693593cda1d61f3a1.zip qemu-b6dcbe086c77ec683f5ff0b693593cda1d61f3a1.tar.gz qemu-b6dcbe086c77ec683f5ff0b693593cda1d61f3a1.tar.bz2 |
ppc4xx_sdram: convert to memory API
Clumsy due to the lack of clipping support, needed for
changing exposed ram size.
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/ppc405.h')
-rw-r--r-- | hw/ppc405.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/ppc405.h b/hw/ppc405.h index e042a05..f0e81a6 100644 --- a/hw/ppc405.h +++ b/hw/ppc405.h @@ -59,16 +59,19 @@ struct ppc4xx_bd_info_t { ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd, uint32_t flags); -CPUState *ppc405cr_init (target_phys_addr_t ram_bases[4], +CPUState *ppc405cr_init (MemoryRegion ram_memories[4], + target_phys_addr_t ram_bases[4], target_phys_addr_t ram_sizes[4], uint32_t sysclk, qemu_irq **picp, int do_init); -CPUState *ppc405ep_init (target_phys_addr_t ram_bases[2], +CPUState *ppc405ep_init (MemoryRegion ram_memories[2], + target_phys_addr_t ram_bases[2], target_phys_addr_t ram_sizes[2], uint32_t sysclk, qemu_irq **picp, int do_init); /* IBM STBxxx microcontrollers */ -CPUState *ppc_stb025_init (target_phys_addr_t ram_bases[2], +CPUState *ppc_stb025_init (MemoryRegion ram_memories[2], + target_phys_addr_t ram_bases[2], target_phys_addr_t ram_sizes[2], uint32_t sysclk, qemu_irq **picp, ram_addr_t *offsetp); |