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author | Cédric Le Goater <clg@kaod.org> | 2019-03-07 23:35:36 +0100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2019-03-12 14:33:04 +1100 |
commit | 6f89f48e56723005b64260d2ab079a015db3ed64 (patch) | |
tree | 153818bd655ace57cb0c7afe957b6ac2bc8285f3 /hw/ppc/pnv_lpc.c | |
parent | c38536bc80fa0b8f44db50a3190bfd241143ab0b (diff) | |
download | qemu-6f89f48e56723005b64260d2ab079a015db3ed64.zip qemu-6f89f48e56723005b64260d2ab079a015db3ed64.tar.gz qemu-6f89f48e56723005b64260d2ab079a015db3ed64.tar.bz2 |
ppc/pnv: lpc: fix OPB address ranges
The PowerNV LPC Controller exposes different sets of registers for
each of the functional units it encompasses, among which the OPB
(On-Chip Peripheral Bus) Master and Arbitrer and the LPC HOST
Controller.
The mapping addresses of each register range are correct but the sizes
are too large. Fix the sizes and define the OPB Arbitrer range to fill
the gap between the OPB Master registers and the LPC HOST Controller
registers.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190307223548.20516-4-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/pnv_lpc.c')
-rw-r--r-- | hw/ppc/pnv_lpc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 9b18ce5..547be60 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -89,10 +89,11 @@ enum { #define LPC_FW_OPB_SIZE 0x10000000 #define LPC_OPB_REGS_OPB_ADDR 0xc0010000 -#define LPC_OPB_REGS_OPB_SIZE 0x00002000 +#define LPC_OPB_REGS_OPB_SIZE 0x00000060 +#define LPC_OPB_REGS_OPBA_ADDR 0xc0011000 +#define LPC_OPB_REGS_OPBA_SIZE 0x00000008 #define LPC_HC_REGS_OPB_ADDR 0xc0012000 -#define LPC_HC_REGS_OPB_SIZE 0x00001000 - +#define LPC_HC_REGS_OPB_SIZE 0x00000100 static int pnv_lpc_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset) { |