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| author | David Gibson <david@gibson.dropbear.id.au> | 2018-03-29 18:29:38 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-04-27 18:05:22 +1000 |
| commit | 67d7d66f27c49a87c6f28ccff814f5d7eaaccec6 (patch) | |
| tree | 93dd765ac703f1d48db281e541c309af53d9b14f /hw/ppc/pnv.c | |
| parent | 0941d728a4636f68523d99a729e24ee12c36d440 (diff) | |
| download | qemu-67d7d66f27c49a87c6f28ccff814f5d7eaaccec6.zip qemu-67d7d66f27c49a87c6f28ccff814f5d7eaaccec6.tar.gz qemu-67d7d66f27c49a87c6f28ccff814f5d7eaaccec6.tar.bz2 | |
target/ppc: Fold slb_nr into PPCHash64Options
The env->slb_nr field gives the size of the SLB (Segment Lookaside Buffer).
This is another static-after-initialization parameter of the specific
version of the 64-bit hash MMU in the CPU. So, this patch folds the field
into PPCHash64Options with the other hash MMU options.
This is a bit more complicated that the things previously put in there,
because slb_nr was foolishly included in the migration stream. So we need
some of the usual dance to handle backwards compatible migration.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'hw/ppc/pnv.c')
| -rw-r--r-- | hw/ppc/pnv.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 0e49c5e..0314881 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -180,7 +180,7 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt) _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq))); _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq))); - _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", env->slb_nr))); + _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", cpu->hash64_opts->slb_size))); _FDT((fdt_setprop_string(fdt, offset, "status", "okay"))); _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0))); |