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authorAmit Tomar <Amit.Tomar@freescale.com>2014-12-19 14:20:37 +0000
committerAlexander Graf <agraf@suse.de>2015-01-07 16:16:28 +0100
commit82e345f57e6482cef960677613125c5aaf2b1654 (patch)
tree30253518bf5d5dc69575f0561dfb878db0eab28c /hw/ppc/e500.c
parentf83c2378bb412b205e9d14dca2f7758d3d23cc88 (diff)
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PPC: e500: Fix GPIO controller interrupt number
The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a problem because IRQ 43 is occupied by the I2C controller which we want to implement next, so we'd have a conflict on that IRQ number. Move the GPIO controller to IRQ 47 where it belongs. Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/ppc/e500.c')
-rw-r--r--hw/ppc/e500.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index a2e60b4..7e17d18 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -60,7 +60,7 @@
#define MPC8544_PCI_REGS_SIZE 0x1000ULL
#define MPC8544_UTIL_OFFSET 0xe0000ULL
#define MPC8XXX_GPIO_OFFSET 0x000FF000ULL
-#define MPC8XXX_GPIO_IRQ 43
+#define MPC8XXX_GPIO_IRQ 47
struct boot_info
{