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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-12-09 23:56:13 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-12-09 23:56:13 +0000
commit52fc1d83bc50b0b6fc6861cfecc5763edbad7e60 (patch)
treec71a7fd557e11d007f1f615134daee34d6cd5786 /hw/piix_pci.c
parentb26177d7ec3f50157a5f37f804ffcace3b2a3945 (diff)
downloadqemu-52fc1d83bc50b0b6fc6861cfecc5763edbad7e60.zip
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Save/load PCI-device, PCI-bus and PIIX3 irq-related state (patches by Uri Lublin.
Note that other PCI bridges are not fixed here. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3793 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/piix_pci.c')
-rw-r--r--hw/piix_pci.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 066817b..d5c7e1e 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -57,6 +57,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
static uint32_t isa_page_descs[384 / 4];
static uint8_t smm_enabled;
+static int pci_irq_levels[4];
static void update_pam(PCIDevice *d, uint32_t start, uint32_t end, int r)
{
@@ -139,22 +140,32 @@ static void i440fx_write_config(PCIDevice *d,
static void i440fx_save(QEMUFile* f, void *opaque)
{
PCIDevice *d = opaque;
+ int i;
+
pci_device_save(d, f);
qemu_put_8s(f, &smm_enabled);
+
+ for (i = 0; i < 4; i++)
+ qemu_put_be32(f, pci_irq_levels[i]);
}
static int i440fx_load(QEMUFile* f, void *opaque, int version_id)
{
PCIDevice *d = opaque;
- int ret;
+ int ret, i;
- if (version_id != 1)
+ if (version_id > 2)
return -EINVAL;
ret = pci_device_load(d, f);
if (ret < 0)
return ret;
i440fx_update_memory_mappings(d);
qemu_get_8s(f, &smm_enabled);
+
+ if (version_id >= 2)
+ for (i = 0; i < 4; i++)
+ pci_irq_levels[i] = qemu_get_be32(f);
+
return 0;
}
@@ -192,7 +203,7 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
d->config[0x72] = 0x02; /* SMRAM */
- register_savevm("I440FX", 0, 1, i440fx_save, i440fx_load, d);
+ register_savevm("I440FX", 0, 2, i440fx_save, i440fx_load, d);
*pi440fx_state = d;
return b;
}
@@ -205,8 +216,6 @@ PCIDevice *piix4_dev;
/* just used for simpler irq handling. */
#define PCI_IRQ_WORDS ((PCI_DEVICES_MAX + 31) / 32)
-static int pci_irq_levels[4];
-
static void piix3_set_irq(qemu_irq *pic, int irq_num, int level)
{
int i, pic_irq, pic_level;