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| author | Juan Quintela <quintela@redhat.com> | 2009-08-28 15:28:19 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-09-04 09:37:24 -0500 |
| commit | bd7dce87eacd90ef99b0e625cc4d5f2ab4573a70 (patch) | |
| tree | 5747afa52de01189a20e02b78c2951dc83fe8516 /hw/piix_pci.c | |
| parent | fd37d8813ca796f5c9993404baffe79981d9b634 (diff) | |
| download | qemu-bd7dce87eacd90ef99b0e625cc4d5f2ab4573a70.zip qemu-bd7dce87eacd90ef99b0e625cc4d5f2ab4573a70.tar.gz qemu-bd7dce87eacd90ef99b0e625cc4d5f2ab4573a70.tar.bz2 | |
Introduce PIIX3IrqState for piix3 irq's state
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/piix_pci.c')
| -rw-r--r-- | hw/piix_pci.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/hw/piix_pci.c b/hw/piix_pci.c index b08b063..b931f84 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -37,6 +37,10 @@ typedef struct PIIX3State { PCIDevice dev; } PIIX3State; +typedef struct PIIX3IrqState { + qemu_irq *pic; +} PIIX3IrqState; + struct PCII440FXState { PCIDevice dev; target_phys_addr_t isa_page_descs[384 / 4]; @@ -219,11 +223,13 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, qemu_irq *pic) PCIBus *b; PCIDevice *d; I440FXState *s; + PIIX3IrqState *irq_state = qemu_malloc(sizeof(*irq_state)); + irq_state->pic = pic; dev = qdev_create(NULL, "i440FX-pcihost"); s = FROM_SYSBUS(I440FXState, sysbus_from_qdev(dev)); b = pci_register_bus(&s->busdev.qdev, "pci.0", - piix3_set_irq, pci_slot_get_pirq, pic, 0, 4); + piix3_set_irq, pci_slot_get_pirq, irq_state, 0, 4); s->bus = b; qdev_init(dev); @@ -240,7 +246,7 @@ static PIIX3State *piix3_dev; static void piix3_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; - qemu_irq *pic = opaque; + PIIX3IrqState *irq_state = opaque; pci_irq_levels[irq_num] = level; @@ -255,7 +261,7 @@ static void piix3_set_irq(void *opaque, int irq_num, int level) if (pic_irq == piix3_dev->dev.config[0x60 + i]) pic_level |= pci_irq_levels[i]; } - qemu_set_irq(pic[pic_irq], pic_level); + qemu_set_irq(irq_state->pic[pic_irq], pic_level); } } |