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| author | Jan Kiszka <jan.kiszka@web.de> | 2011-04-10 12:53:39 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-04-27 16:31:12 +0200 |
| commit | 661bfc80e876d32da8befe53ba0234d87fc0bcc2 (patch) | |
| tree | beefdc3b3a81220d81049aafd633b4db3d06486e /hw/pflash_cfi02.c | |
| parent | 70afb8ff90e9d922ed729e6dbabaff6d67c461aa (diff) | |
| download | qemu-661bfc80e876d32da8befe53ba0234d87fc0bcc2.zip qemu-661bfc80e876d32da8befe53ba0234d87fc0bcc2.tar.gz qemu-661bfc80e876d32da8befe53ba0234d87fc0bcc2.tar.bz2 | |
pflash: Restore & fix lazy ROMD switching
Commit 5145b3d1cc revealed a bug in the lazy ROMD switch-back logic, but
resolved it by breaking that feature. This approach addresses the issue
by switching back to ROMD after a certain amount of read accesses
without further unlock sequences.
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/pflash_cfi02.c')
| -rw-r--r-- | hw/pflash_cfi02.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index 370c5ee..14bbc34 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -50,6 +50,8 @@ do { \ #define DPRINTF(fmt, ...) do { } while (0) #endif +#define PFLASH_LAZY_ROMD_THRESHOLD 42 + struct pflash_t { BlockDriverState *bs; target_phys_addr_t base; @@ -70,6 +72,7 @@ struct pflash_t { ram_addr_t off; int fl_mem; int rom_mode; + int read_counter; /* used for lazy switch-back to rom mode */ void *storage; }; @@ -112,10 +115,10 @@ static uint32_t pflash_read (pflash_t *pfl, target_phys_addr_t offset, DPRINTF("%s: offset " TARGET_FMT_plx "\n", __func__, offset); ret = -1; - if (!pfl->rom_mode) { - /* Lazy reset of to ROMD mode */ - if (pfl->wcycle == 0) - pflash_register_memory(pfl, 1); + /* Lazy reset to ROMD mode after a certain amount of read accesses */ + if (!pfl->rom_mode && pfl->wcycle == 0 && + ++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) { + pflash_register_memory(pfl, 1); } offset &= pfl->chip_len - 1; boff = offset & 0xFF; @@ -254,6 +257,7 @@ static void pflash_write (pflash_t *pfl, target_phys_addr_t offset, /* Set the device in I/O access mode if required */ if (pfl->rom_mode) pflash_register_memory(pfl, 0); + pfl->read_counter = 0; /* We're in read mode */ check_unlock0: if (boff == 0x55 && cmd == 0x98) { |