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| author | Michael S. Tsirkin <mst@redhat.com> | 2009-09-29 18:53:26 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-10-05 09:32:52 -0500 |
| commit | 5a1fc5e8529afb6041a3dfa406a94c187d2afc1d (patch) | |
| tree | dd0ce1ed2be9785c5f431e5ae3b162621c8a9fca /hw/pci.h | |
| parent | 8f2498f9f696feb8334a478528c1170f90445fd4 (diff) | |
| download | qemu-5a1fc5e8529afb6041a3dfa406a94c187d2afc1d.zip qemu-5a1fc5e8529afb6041a3dfa406a94c187d2afc1d.tar.gz qemu-5a1fc5e8529afb6041a3dfa406a94c187d2afc1d.tar.bz2 | |
qemu: clean up target page usage in msix
Since cpu_register_phys_memory does not require size to be a multiple of
target page size, simply make msix page size 0x1000. Do this in msix,
reverting part of 5e520a7d500ec2569d22d80f9ef4272a34cb3c80, as we no
longer have to pass target page around.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pci.h')
| -rw-r--r-- | hw/pci.h | 6 |
1 files changed, 0 insertions, 6 deletions
@@ -213,12 +213,6 @@ struct PCIDevice { uint32_t msix_bar_size; /* Version id needed for VMState */ int32_t version_id; - /* How much space does an MSIX table need. */ - /* The spec requires giving the table structure - * a 4K aligned region all by itself. Align it to - * target pages so that drivers can do passthrough - * on the rest of the region. */ - target_phys_addr_t msix_page_size; }; PCIDevice *pci_register_device(PCIBus *bus, const char *name, |