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| author | Isaku Yamahata <yamahata@valinux.co.jp> | 2009-10-30 21:21:21 +0900 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-11-09 08:43:10 -0600 |
| commit | edb000350d265b2eddb297453ddf9d504fb85fd0 (patch) | |
| tree | abce18d2414be6481c90ceeb682b9dc670e6e0f6 /hw/pci.c | |
| parent | 260c0cd3d985e51b15870ff47e17b7b930efbda1 (diff) | |
| download | qemu-edb000350d265b2eddb297453ddf9d504fb85fd0.zip qemu-edb000350d265b2eddb297453ddf9d504fb85fd0.tar.gz qemu-edb000350d265b2eddb297453ddf9d504fb85fd0.tar.bz2 | |
pci: teach pci_default_config_write() ROM bar for normal/bridge device .
When updated ROM expantion address of header type 0, it missed
to update mappings.
Add PCI_ROM_ADDRESS check whether to call pci_update_mappings()
Also update pci mapping when PCI_ROM_ADDRESS1 is written for header type 1.
pci_update_mapping() path isn't performance critical,
so call it even independent of header type.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pci.c')
| -rw-r--r-- | hw/pci.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -707,6 +707,8 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) d->config[addr] = (d->config[addr] & ~wmask) | (val & wmask); } if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) || + ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) || + ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) || range_covers_byte(addr, l, PCI_COMMAND)) pci_update_mappings(d); } |