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authorBernhard Beschow <shentey@gmail.com>2023-06-30 09:37:17 +0200
committerMichael S. Tsirkin <mst@redhat.com>2023-07-10 16:29:17 -0400
commit82feef45f42db607b9439411d4aad7c21bdf3047 (patch)
tree600d8e68892379d19a143b2c4239cab4ba70e3ea /hw/pci-host
parentc84858fd907067dcfb7624083dd44879664cc019 (diff)
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hw/pci-host/i440fx: Add PCI_HOST_{ABOVE, BELOW}_4G_MEM_SIZE properties
Introduce the properties in anticipation of QOM'ification; Q35 has the same properties. Note that we want to avoid a "ram size" property in the QOM interface since it seems redundant to both properties introduced in this change. Thus the removal of the ram_size parameter. We assume the invariant of both properties to sum up to "ram size" which is already asserted in pc_memory_init(). Under Xen the invariant seems to hold as well, so we now also check it there. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20230630073720.21297-15-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-host')
-rw-r--r--hw/pci-host/i440fx.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index de14c75..8731740 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -52,6 +52,8 @@ struct I440FXState {
MemoryRegion *pci_address_space;
MemoryRegion *ram_memory;
Range pci_hole;
+ uint64_t below_4g_mem_size;
+ uint64_t above_4g_mem_size;
uint64_t pci_hole64_size;
bool pci_hole64_fix;
uint32_t short_root_bus;
@@ -264,7 +266,6 @@ PCIBus *i440fx_init(const char *pci_type,
DeviceState *dev,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
- ram_addr_t ram_size,
ram_addr_t below_4g_mem_size,
ram_addr_t above_4g_mem_size,
MemoryRegion *pci_address_space,
@@ -281,6 +282,8 @@ PCIBus *i440fx_init(const char *pci_type,
s->io_memory = address_space_io;
s->pci_address_space = pci_address_space;
s->ram_memory = ram_memory;
+ s->below_4g_mem_size = below_4g_mem_size;
+ s->above_4g_mem_size = above_4g_mem_size;
b = pci_root_bus_new(dev, NULL, s->pci_address_space,
s->io_memory, 0, TYPE_PCI_BUS);
@@ -290,7 +293,7 @@ PCIBus *i440fx_init(const char *pci_type,
d = pci_create_simple(b, 0, pci_type);
f = I440FX_PCI_DEVICE(d);
- range_set_bounds(&s->pci_hole, below_4g_mem_size,
+ range_set_bounds(&s->pci_hole, s->below_4g_mem_size,
IO_APIC_DEFAULT_ADDRESS - 1);
/* setup pci memory mapping */
@@ -321,6 +324,7 @@ PCIBus *i440fx_init(const char *pci_type,
PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);
}
+ ram_addr_t ram_size = s->below_4g_mem_size + s->above_4g_mem_size;
ram_size = ram_size / 8 / 1024 / 1024;
if (ram_size > 255) {
ram_size = 255;
@@ -380,6 +384,10 @@ static Property i440fx_props[] = {
DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, I440FXState,
pci_hole64_size, I440FX_PCI_HOST_HOLE64_SIZE_DEFAULT),
DEFINE_PROP_UINT32("short_root_bus", I440FXState, short_root_bus, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_BELOW_4G_MEM_SIZE, I440FXState,
+ below_4g_mem_size, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MEM_SIZE, I440FXState,
+ above_4g_mem_size, 0),
DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true),
DEFINE_PROP_END_OF_LIST(),
};