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author | Bernhard Beschow <shentey@gmail.com> | 2023-06-30 09:37:15 +0200 |
---|---|---|
committer | Michael S. Tsirkin <mst@redhat.com> | 2023-07-10 16:29:17 -0400 |
commit | 09f85b7b93a05f1551509b245be99529a9e278f9 (patch) | |
tree | fd1a2a222cb51245b07bc2be6438424b6c1f9599 /hw/pci-host | |
parent | 44df0552a020efd6191714da44edede5ded37ec8 (diff) | |
download | qemu-09f85b7b93a05f1551509b245be99529a9e278f9.zip qemu-09f85b7b93a05f1551509b245be99529a9e278f9.tar.gz qemu-09f85b7b93a05f1551509b245be99529a9e278f9.tar.bz2 |
hw/pci-host/i440fx: Make MemoryRegion pointers accessible as properties
The goal is to eliminate i440fx_init() which is a legacy init function. This
neccessitates the memory regions to be properties, like in Q35, which will be
assigned in board code.
Since i440fx needs different PCI devices in Xen mode, and since i440fx shall
be self-contained, the PCI device will be created during realization of the
host. Thus the pointers need to be moved to the host structure to be usable as
properties.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230630073720.21297-13-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci-host')
-rw-r--r-- | hw/pci-host/i440fx.c | 42 |
1 files changed, 30 insertions, 12 deletions
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index e84fcd5..b9530fc 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -47,6 +47,10 @@ OBJECT_DECLARE_SIMPLE_TYPE(I440FXState, I440FX_PCI_HOST_BRIDGE) struct I440FXState { PCIHostState parent_obj; + + MemoryRegion *system_memory; + MemoryRegion *pci_address_space; + MemoryRegion *ram_memory; Range pci_hole; uint64_t pci_hole64_size; bool pci_hole64_fix; @@ -214,12 +218,25 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { + I440FXState *s = I440FX_PCI_HOST_BRIDGE(obj); PCIHostState *phb = PCI_HOST_BRIDGE(obj); memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, "pci-conf-idx", 4); memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, "pci-conf-data", 4); + + object_property_add_link(obj, PCI_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->ram_memory, + qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, + (Object **) &s->pci_address_space, + qdev_prop_allow_set_link_before_realize, 0); + + object_property_add_link(obj, PCI_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, + (Object **) &s->system_memory, + qdev_prop_allow_set_link_before_realize, 0); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) @@ -255,27 +272,28 @@ PCIBus *i440fx_init(const char *pci_type, PCII440FXState *f; unsigned i; - b = pci_root_bus_new(dev, NULL, pci_address_space, + s->system_memory = address_space_mem; + s->pci_address_space = pci_address_space; + s->ram_memory = ram_memory; + + b = pci_root_bus_new(dev, NULL, s->pci_address_space, address_space_io, 0, TYPE_PCI_BUS); phb->bus = b; sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); d = pci_create_simple(b, 0, pci_type); f = I440FX_PCI_DEVICE(d); - f->system_memory = address_space_mem; - f->pci_address_space = pci_address_space; - f->ram_memory = ram_memory; range_set_bounds(&s->pci_hole, below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS - 1); /* setup pci memory mapping */ - pc_pci_as_mapping_init(f->system_memory, f->pci_address_space); + pc_pci_as_mapping_init(s->system_memory, s->pci_address_space); /* if *disabled* show SMRAM to all CPUs */ memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", - f->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); - memory_region_add_subregion_overlap(f->system_memory, SMRAM_C_BASE, + s->pci_address_space, SMRAM_C_BASE, SMRAM_C_SIZE); + memory_region_add_subregion_overlap(s->system_memory, SMRAM_C_BASE, &f->smram_region, 1); memory_region_set_enabled(&f->smram_region, true); @@ -283,17 +301,17 @@ PCIBus *i440fx_init(const char *pci_type, memory_region_init(&f->smram, OBJECT(d), "smram", 4 * GiB); memory_region_set_enabled(&f->smram, true); memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", - f->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); + s->ram_memory, SMRAM_C_BASE, SMRAM_C_SIZE); memory_region_set_enabled(&f->low_smram, true); memory_region_add_subregion(&f->smram, SMRAM_C_BASE, &f->low_smram); object_property_add_const_link(qdev_get_machine(), "smram", OBJECT(&f->smram)); - init_pam(&f->pam_regions[0], OBJECT(d), f->ram_memory, f->system_memory, - f->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); + init_pam(&f->pam_regions[0], OBJECT(d), s->ram_memory, s->system_memory, + s->pci_address_space, PAM_BIOS_BASE, PAM_BIOS_SIZE); for (i = 0; i < ARRAY_SIZE(f->pam_regions) - 1; ++i) { - init_pam(&f->pam_regions[i + 1], OBJECT(d), f->ram_memory, - f->system_memory, f->pci_address_space, + init_pam(&f->pam_regions[i + 1], OBJECT(d), s->ram_memory, + s->system_memory, s->pci_address_space, PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); } |