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author | Peter Maydell <peter.maydell@linaro.org> | 2022-11-25 11:52:38 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2022-12-16 15:59:07 +0000 |
commit | 36cdc8b3b87b8a42933b1987ad00cbe1c1a6f6d8 (patch) | |
tree | aa0100dc336eb0bfd2037415238f9aa77ed3cf6a /hw/pci-host | |
parent | f4c636b0c2f53531e16e018b6e096d26b5809dfd (diff) | |
download | qemu-36cdc8b3b87b8a42933b1987ad00cbe1c1a6f6d8.zip qemu-36cdc8b3b87b8a42933b1987ad00cbe1c1a6f6d8.tar.gz qemu-36cdc8b3b87b8a42933b1987ad00cbe1c1a6f6d8.tar.bz2 |
hw/intc/xics: Reset TYPE_ICS objects with device_cold_reset()
The realize method for the TYPE_ICS class uses qemu_register_reset()
to register a reset handler, as a workaround for the fact that
currently objects which directly inherit from TYPE_DEVICE don't get
automatically reset. However, the reset function directly calls
ics_reset(), which is the function that implements the legacy reset
method. This means that only the parent class's data gets reset, and
a subclass which also needs to handle reset, like TYPE_PHB3_MSI, has
to register its own reset function.
Make the TYPE_ICS reset function call device_cold_reset() instead:
this will handle reset for both the parent class and the subclass,
and will work whether the classes are using legacy reset or 3-phase
reset. This allows us to remove the reset function that the subclass
currently has to set up.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221125115240.3005559-6-peter.maydell@linaro.org
Diffstat (limited to 'hw/pci-host')
-rw-r--r-- | hw/pci-host/pnv_phb3_msi.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c index 2f41129..ae908fd 100644 --- a/hw/pci-host/pnv_phb3_msi.c +++ b/hw/pci-host/pnv_phb3_msi.c @@ -239,11 +239,6 @@ static void phb3_msi_reset(DeviceState *dev) msi->rba_sum = 0; } -static void phb3_msi_reset_handler(void *dev) -{ - phb3_msi_reset(dev); -} - void pnv_phb3_msi_update_config(Phb3MsiState *msi, uint32_t base, uint32_t count) { @@ -272,8 +267,6 @@ static void phb3_msi_realize(DeviceState *dev, Error **errp) } msi->qirqs = qemu_allocate_irqs(phb3_msi_set_irq, msi, ics->nr_irqs); - - qemu_register_reset(phb3_msi_reset_handler, dev); } static void phb3_msi_instance_init(Object *obj) |