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| author | Helge Deller <deller@gmx.de> | 2023-10-14 06:45:59 +0200 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2023-10-20 00:47:38 +0200 |
| commit | e029bb00a79bea226477749f9b10a2ff9e7930ef (patch) | |
| tree | 9b940868d9c19f121c9942f766363b4d8910d4fc /hw/pci-host/trace-events | |
| parent | a1e6a5c46219bada2c7b932748527553b36559ae (diff) | |
| download | qemu-e029bb00a79bea226477749f9b10a2ff9e7930ef.zip qemu-e029bb00a79bea226477749f9b10a2ff9e7930ef.tar.gz qemu-e029bb00a79bea226477749f9b10a2ff9e7930ef.tar.bz2 | |
hw/pci-host: Add Astro system bus adapter found on PA-RISC machines
The 64-bit PA-RISC machines use a Astro system bus adapter (SBA)
with Elroy PCI host chips.
Later generation Astro chips were named Pluto, Ike and REO.
Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'hw/pci-host/trace-events')
| -rw-r--r-- | hw/pci-host/trace-events | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index 9d216bb..b2f47e6 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -46,3 +46,14 @@ pnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" dino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" + +# astro.c +astro_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" +astro_chip_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 +astro_chip_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 +elroy_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 +elroy_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 +elroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 +elroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 +iosapic_reg_write(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64 +iosapic_reg_read(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64 |