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author | Paolo Bonzini <pbonzini@redhat.com> | 2015-03-31 14:14:28 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-06-05 17:36:39 +0200 |
commit | 3de70c0899db2712a5ae321093aa6173d6f76706 (patch) | |
tree | 244b55f1c4eb255ac76a595ce43d5e111fc8855f /hw/pci-host/q35.c | |
parent | f809c605122df291bbb9004dc487bde0969134b5 (diff) | |
download | qemu-3de70c0899db2712a5ae321093aa6173d6f76706.zip qemu-3de70c0899db2712a5ae321093aa6173d6f76706.tar.gz qemu-3de70c0899db2712a5ae321093aa6173d6f76706.tar.bz2 |
hw/i386: remove smram_update
It's easier to inline it now that most of its work is done by the CPU
(rather than the chipset) through /machine/smram and the memory API.
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/pci-host/q35.c')
-rw-r--r-- | hw/pci-host/q35.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index eefa199..24829e0 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -268,7 +268,8 @@ static void mch_update_smram(MCHPCIState *mch) PCIDevice *pd = PCI_DEVICE(mch); memory_region_transaction_begin(); - smram_update(&mch->smram_region, pd->config[MCH_HOST_BRIDGE_SMRAM]); + memory_region_set_enabled(&mch->smram_region, + !(pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_D_OPEN)); memory_region_set_enabled(&mch->smram, pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_G_SMRAME); memory_region_transaction_commit(); |